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Substrat De Boîtier IC
Technologie d'emballage dimensionnel des puces IC au niveau des Wafers
Substrat De Boîtier IC
Technologie d'emballage dimensionnel des puces IC au niveau des Wafers

Technologie d'emballage dimensionnel des puces IC au niveau des Wafers

2021-08-16
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Author:T.Kim

Taille de la puce de niveau Wafer Technologie d'emballage (wlcsp) application status and market prospect analysis in (2)021.


Advanced Paquet IC refers to the most cutting-edge packaging form and technology at that time. At present, packaging with flip chip (FC) structure, wafer level packaging (WLP), 2.5D packaging, 3D packaging are considered as Emballage Premium category.

Packaging development diagram

  • Advanced packaging development circuit diagram


The overall semiconductor packaging market is expected to grow in revenue at a compound annual growth rate (CAGR) of 5.2% entre 2018 et 2024, while the Emballage Premium market is expected to grow at a CAGR of 8% and the market size will grow to $40 billion by 2023. Marché traditionnel des emballages, on the other hand, is growing at a cagR of less than 3.3%. Among the various Emballage Premium platforms, 3D silicon through hole (TSV) and fan-out (FAN-out) packages will grow by 29% and 15%, Séparément.. Flip-chip packages, which account for the majority of the advanced package market, will grow at a compound annual growth rate of about 8 per cent. Ventilateur dans WLP, meanwhile, will also grow at a CAGR of 8 per cent, driven mainly by the mobile market.

Global Advanced Packaging Technology Market Size forecast, 2018-2024 (us $1 billion)

Prévision de la taille du marché

In addition, there is a growing trend to combine front-end wafer manufacturing with advanced back-end packaging. Major global wafer manufacturers (such as Intel, TSMC and Samsung) have closely combined advanced wafer manufacturing technology with Emballage Premium forms to strengthen the technology integration advantages of IC product manufacturing. Influenced by both technology and scale, the concentration of the global sealing and testing industry has steadily increased. Before 2017, eight sealing and testing enterprises (including the back-end packaging business of founds) occupied about 87% of the Emballage Premium Part de marché.

Wafer level chip size Packaging (WLCSP), as a kind of Emballage Premium technology, meets the needs and trends of consumer electronics development (light, small, Court, thin and low price). Par rapport aux emballages traditionnels, WLCSP packaging has the following main advantages: (1) WLCSP optimized the packaging industry chain. In the traditional packaging method, the wafer is first sliced into a pellet chip. After being tested as a qualified chip, the wafer is placed on the lead frame or packaging substrate (substrate), and then the packaging test is carried out. The industrial chain involves the wafer factory, substrate factory, sealing factory and testing factory. The wafer size packaging is to encapsulate and test the wafers, and then cut the wafers after the encapsulation and test. Compared with traditional packaging, WLCSP packaging can integrate the substrate factory, packaging factory and test factory in the traditional packaging industry chain into one, so that the chip production cycle is greatly shortened, the production efficiency is improved, and the production cost is reduced. Deuxièmement,, WLCSP package can reduce the testing of qualified chips before packaging, and can effectively reduce the packaging cost; Finally, THE WLCSP package is an extension of wafer manufacturing technology, which greatly reduces the technical difference between the semiconductor back segment (packaging) and the front segment (wafer manufacturing), Facile à réaliser l'arrimage technique de la section arrière et de la section avant des semi - conducteurs. Wlcsp package can Integrated Circuit Design, wafer manufacturing, Essais d'emballage, substrate factory into one, optimize the industrial chain, solve the problem of technical and standard docking in IC design, wafer manufacturing, Essais d'emballage, substrate factory and other links, Promouvoir davantage le développement du modèle de coulée professionnelle.

Number of wafers using Emballage Premium (equivalent to 12 inches) and distribution by business model in 2018

Répartition

2. The packaging cost decreases with the increase of the number of chips on the wafer. L'emballage de la taille de la puce au niveau de la plaquette est l'emballage de la plaquette entière et la coupe de la puce., while the traditional packaging is to cut the wafer into the chip first, and then implement the chip packaging. Generally speaking, the packaging cost of WLCSP is measured according to the number of wafers, and the number of chips after cutting is not necessarily related to the traditional packaging packaging cost is measured according to the number of encapsulated chips. Alors..., the packaging cost of WLCSP decreases as the wafer size increases and the number of chips increases. Évolution du marché de l'électronique grand public, small, short, thin, wafer level chip size packaging cost advantage is more obvious, will gradually usurp the traditional packaging market share.

3. Wlcsp deviendra le principal mode d'emballage à l'avenir. L'industrie estime que la technologie d'emballage 3D basée sur le silicium via Hole (TSV) est la principale solution au - delà de la loi de Moore et la tendance au développement de la technologie d'emballage des semi - conducteurs. L'emballage wlcsp est la base de la technologie Silicon through Hole, et les deux processus sont très similaires. En maîtrisant la technologie d'emballage wlcsp (en particulier la série shellcase wlcsp), nous pouvons rapidement entrer dans le domaine de la technologie des trous de silicium et jouer un rôle important dans la future technologie d'emballage 3D.

The difference between wafer level chip size package and traditional package

The difference between wafer level chip size package and traditional package.png

Yole Development forecasts that the WLCSP package market will grow from approximately $1.4 billion in 2010 to $3.2 milliards de dollars en 2018, tcac 12%, Environ 11% des progiciels avancés et environ 6% de l'industrie mondiale de la bêta fermée. Driven by demand for small size chips such as consumer electronics and automotive electronics, we expect the WLCSP package market to reach approximately $3.5 billion in 2019, with further growth expected.

WLCSP mainly adopts wafer bump packaging and Shellcase series WLCSP packaging technology. Wafer bump package is a form of WLCSP package with relatively low technical difficulty. Its main feature is that the circuit and welding pad can be directly led out on the front of the chip. Shellcase series WLCSP can not only lead the circuit and welding pad directly on the front of the chip, but also lead the circuit of the chip to the back of the chip and then make the welding pad. L'emballage wlcsp de la série shellcase comprend les principaux points techniques de l'emballage des points saillants des Wafers, which is more difficult than the wafer bump package, and the process is more complex than the wafer bump package. Due to the significant differences in technical difficulties and application fields, Le prix unitaire de la technologie d'emballage des points saillants des Wafers est inférieur à celui de la technologie d'emballage de la série shellcase.. La famille shellcase wlcsp offre des avantages exceptionnels dans l'emballage des capteurs d'image, L'emballage des points saillants de la plaquette ne peut pas être utilisé dans le capteur d'image en raison de la plaque de soudage sur la face avant de la puce..

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En 2018, the size of the packaging substrate market was nearly $7 billion