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Discuss the packaging technology and share analysis result
2021-08-24
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Author:Belle

This manuscript introduces COG (chip on glass) and COF (chip on flex) packaging technologies. With the development of high-density packaging technology, COG and COF technologies have been widely used in various flat panel displays and personal mobile products. COG and COF technologies have become the main packaging technology used in LCD manufacturing due to their high density, multiple I/O, and mainly using conductive adhesive packaging.

[Keywords] COG, COF, anisotropic conductive adhesive, LCD package

1 Foreword

The popularization of mobile electronic products and large-screen displays has promoted the rapid development of low-cost, high-density and high-density electronic production technology. Large-size electronic products such as LCD monitors, LCD TVs, plasma TVs, small and medium-sized electronic products such as mobile phones, digital cameras, digital video cameras, and other 3C products are all trending towards lightness, thinness and shortness. This requires high density and small size. A new generation of packaging technology that can be installed freely to meet the above needs. In this context, COG and COF technologies have developed rapidly, becoming a major packaging form of driver ICs for flat panel displays such as LCD and PDP, and then becoming an important part of these display modules. At the same time, with anisotropic conductive adhesive packaging technology, its application fields are rapidly expanding, and have been applied in RFID, medical electronic equipment, mobile personal electronic products and other micro electronic products.


2 The structure of COG and COF

    The full name of COG is chip on glass, and in Chinese it is called chip on glass technology. It directly encapsulates the IC on glass through anisotropic conductive adhesive (ACF), and realizes the interconnection and encapsulation of IC conductive bumps and ITO transparent conductive pads on the glass. The full name of COF is chip on flex or chip on film, which is the chip technology on flexible substrates in Chinese, and it also becomes the soft film assembly technology. Similar to the COG technology, the IC chip is directly packaged on the flexible printed circuit board to achieve the purpose of high packaging density, weight reduction, volume reduction, and freedom to bend and install.

If the IC, flexible substrate, glass panel, PCB, and other passive components (capacitors, resistors, etc.) are connected in an appropriate way (such as the IC directly connected to the glass panel through ACF, or the flexible substrate and the IC and glass panel use ACF) For connection, the flexible substrate and passive components can be connected by traditional reflow soldering, and the flexible substrate and PCB can be connected by traditional soldering or plugging) to form a display module with COG or COF packaging.

COG and COF packaging mainly use anisotropic conductive adhesive to realize the interconnection between IC and glass substrate or flexible substrate, and the IC mainly adopts flip chip structure. The bumping technology of flip-chip and the bumping technology on the substrate will be specifically introduced to readers in future special articles. The following mainly introduces the basic flexible manufacturing and ACF interconnection process technology.

Packaging technology

3 Production of fine circuits on flexible substrates

     As the display density of displays increases, the driver chip I/O is required to greatly increase, and the pitch between the lead pads has been lower than 30μm. Therefore, the requirements for fine circuit patterns of flexible substrates are also increasing, and the interconnection pad spacing has been increased. It has reached 15μm and continues to decrease. Therefore, the manufacturing technology of flexible circuit boards has become the focus of research. At present, the production of fine circuits on flexible substrates mainly includes subtractive, semi-additive and additive methods.

3.1 Subtractive layer method

    The subtractive layer method is the main method of traditional FPC production. It is to paste a layer of photosensitive resist dry film or coating a layer of liquid photosensitive resist on the FCCL, and then through exposure, development, etching, stripping, and finally form the required circuit pattern. The line width pitch that can be achieved by the subtractive method is closely related to the resolution of the photosensitive resist layer. The resolution of the photosensitive resist layer is determined by the thickness of the resist layer. The thinner the thickness, the finer circuit patterns can be formed on the photosensitive resist layer. This is because light will scatter when passing through the resist layer. The thicker the resist layer, the greater the degree of scattering and the greater the error of the formed line. To make a line width below 50μm, the dry film thickness must be below 20μm, but it is very difficult to manufacture a dry film that is too thin, so people are more willing to use a wet film process that is thinner than the dry film and can be controlled by itself. The company can even use a roller to coat liquid photoresist to produce a 5μm wet film. But too thin wet film will inevitably have defects such as pinholes, bubbles, scratches, and its uniformity is not as good as dry film, so it cannot replace dry film in the short term. Due to the above reasons, coupled with the inevitable side etching phenomenon during etching, the limit line width of the subtractive method is 20μm. If you want to get a thinner circuit, you must cooperate with thinner 9μm, 5μm or even 3μm ultra-thin copper foil, so as to shorten the etching time as much as possible, reduce side corrosion, and obtain fine lines. However, these thick copper foils and related processes All are still in the experimental stage and cannot be mass-produced.
 
3.2 Semi-additive layer method
     If you want to make a more refined circuit, you can consider using the semi-additive layer method. This
The base material of the semi-additive method is mostly 5μm thin copper foil, and sometimes the conventional copper foil can be used after being thinned by etching [9]. In this method, the light scattering has no adverse effect on the circuit pattern, and a thicker resist layer can be used to make the circuit below 20μm.
 
3.3 Additive layer method
      The layer-adding method is a method in which an insulating substrate is directly processed to form a circuit pattern.
The reason for sputtering a thin layer of Cr between the PI and the subsequent copper layer is to increase the bonding force between the PI and the copper layer and prevent the subsequent copper layer from peeling off. This method can produce the finest circuits currently available, with a line spacing of up to 3μm. Another advantage of this method is that a thick photosensitive dry film can be used to increase the thickness of the circuit, such as a thickness-to-width ratio of 8 times, which can suppress the increase in DC resistance (R) when the circuit is refined. However, this method requires the use of equipment for semiconductor manufacturing, and the process is complicated and the cost is relatively high.
 
4 Interconnection technology of chip and substrate

     At present, the interconnection technologies of flexible substrates and ICs mainly include Au-Sn eutectic interconnection, anisotropic conductive adhesive interconnection, and non-conductive adhesive interconnection.


4. 1 Gold-tin eutectic connection process

     This process utilizes the gold bumps on the IC chip and the tin-plated FPC internal leads to form a gold-tin eutectic on the contact surface through heating and pressure to achieve the purpose of connection. The soldering temperature of this method must be above the formation temperature of the gold-tin eutectic (325-330°C), which is a severe test for the heat resistance of the substrate. In addition, the proper welding temperature is difficult to grasp. When the temperature of the connection part is relatively low, the eutectic formation of the inner lead is insufficient, resulting in an open circuit of the inner lead. However, when the temperature of the connection part is too high, the welding tool will rise and leave while the gold-tin eutectic is still in a molten state, which will easily lead to the occurrence of internal lead open circuit. Also, when the temperature is low and the tin plating on the inner leads is thicker, the tin will not be absorbed by the gold (no eutectic formation), which will cause short circuits and leakage. It is very important to choose a suitable temperature, and now the temperature of 400℃ is more frequently used.

In order to meet the needs of narrower pitch bonding, people have also researched and developed a process of hot-compression bonding of gold to gold contacts, using metal diffusion mechanisms to form local metal bonds. However, since the melting point of gold is quite high, in order to form diffusion, gold-to-gold bonding requires a higher bonding temperature and longer bonding time than gold-to-tin bonding. At this time, the deformation of the substrate may be extremely serious. However, the use of ultrasonic assisted welding technology and plasma surface cleaning technology can effectively reduce the temperature required for welding. The industry generally believes that the eutectic process can meet the line spacing of more than 20um connections, otherwise short circuits are prone to occur.


4.2 Anisotropic conductive adhesive film (ACF) connection process

    The ACF material disperses fine metal particles or metal-plated plastic spheres in a resin material, and exists in the form of a film in the B-stage state. After bonding the ACF between the bumps of the IC and the circuit on the substrate, use appropriate pressure, temperature and time to make the resin flow and the conductive particles contact the bumps and the circuit on the substrate to achieve electrical conduction. At the same time, due to the selection of an appropriate conductive particle size and addition amount, the bumps and bumps cannot contact each other to achieve anisotropic conduction characteristics.

     There are various types of ACF on the market, but the most commonly used are gold-plated plastic pellets with a diameter of 3-5μm, which are formed by dispersing in a thermosetting epoxy resin system with a density of 40,000-60,000 pcs/mm2. As the epoxy resin cures and shrinks after hot pressing, the bonding strength between the IC bumps and the substrate circuit is good, the conductive particles are squeezed and deformed, and the resulting elastic force makes the conductive particles come in closer contact with the upper and lower interfaces, and the conductivity is better. Moreover, because the conductive particles are elastic, even if the connection surface is not very flat, the pressure difference generated by the conductive particles can be offset by the elastic force of the conductive particles. However, ACF has short-circuit problems due to conductive particles, and a too small line width results in very few conductive particles that can be captured at the contacts, making it unable to cope with IC connections with line width spacing below 17μm. The electrical reliability of the ACF connection is not as good as the eutectic process. In the subsequent reflow soldering process, it may also be deformed due to thermal stress, resulting in a decrease in electrical conductivity or even an open circuit. Nevertheless, as long as the various parameters in the ACF bonding process (compression temperature, pressure, time, heating rate, etc.) are mastered, the reliability of ACF can fully meet the requirements. In addition, the ACF process has low pressing temperature (below 200°C), simple processing, high yield, and environmental protection. It has become the main interconnection method of COG and COF. At the same time, ACF is also the main way to connect flexible substrates and glass panels.


4.3 Non-conductive adhesive (NCA) connection process

      The NCA bonding method mainly relies on the direct contact between the chip and the electrodes on both sides of the substrate to achieve electrical conduction, while the purpose of NCA is to complete the electrode crimping by the resin hardening and shrinking, and use the mechanical properties of the resin to maintain the contact and conduction between the electrodes. The oppressive force needed. The role of the NCA material is to provide the bonding force between the bumps and the indirect points of the substrate circuit and to protect the contacts and maintain good reliability. Therefore, the material must have the following characteristics: good mechanical and physical properties, including high Tg, high elastic modulus , High shrinkage and low thermal expansion coefficient, good wetting effect, moisture-proof properties, adhesive properties and impact resistance; it can be cured in a short time at high temperature (20sec, 150 ~ 250 ℃); it has excellent electrical insulation properties. The NCA process is compatible with the ACF process, just add the electro-adhesive unit in front of the alignment equipment. In the NCA process, the bumps and the substrate circuit are in direct mechanical contact, and the probability of lateral short circuit is very small. Therefore, NCA can handle IC connections (17μm or less) that are smaller than the limit pitch of the eutectic and ACF processes. However, NCA has higher requirements for materials than ACF. For example, the flatness of the chip bump height must be good, the substrate surface must be very flat, the base material must have higher dimensional stability, and the connecting lines must be electroplated with gold to avoid the formation of oxide layers. The connection reliability of NCA has yet to be examined. These factors have restricted the use of NCA, making it temporarily unable to become a mainstream process.


6 Conclusion

     With the development of high-density packaging technology, COG and COF technologies have been widely used in various flat panel displays and personal mobile products. COG and COF technologies have become the main packaging form of LCD driver ICs due to their many advantages such as high density, multiple I/O and mainly using conductive adhesive packaging. COF is a very promising packaging technology. Due to the advancement of flexible circuit manufacturing technology, its bending strength is high, passive components can be added, there is no need to make suspended leads, and the panel area utilization rate is high. It has been extended to the field of high-density packaging other than LCD packaging, combined with ACF interconnection technology , COF technology has become a form of packaging with the highest packaging density at present.