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IC Substrate

IC Substrate

IC Substrate

IC Substrate

IC Substrate electroplating process
2021-08-12
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Author:T.Kim

New IC Substrate electroplating process: blind hole, through hole and embedded groove filling  


Abstract  


In the age of miniaturization of electronic products, high yield and low cost integrated IC Substrate provide a reliable way to realize high density interconnection (HDI) between chips and PCBs.  In order to maximize the available carrier space, the distance between the copper pattern -- the pattern width and the pattern spacing (L/S) -- should be minimized.  In common PCB technology, the pattern width and pattern distance are greater than 40 μm, while more advanced wafer level technology can achieve pattern width and pattern distance up to 2 μm.  Over the past decade, chip sizes have decreased significantly with on-board L/S, presenting unique challenges to both the printed circuit board and semiconductor industries.  

 

Fan-out Panel Level Packaging (FOPLP) is a new manufacturing technology designed to bridge the gap between the PCB and IC/semiconductor fields.  Although FOPLP is still an emerging technology, it is favored by the market because of its ability to increase floor space utilization and capacity and to increase competitive advantage by reducing costs.  In this market, the key to fine circuit performance is the uniformity or flatness of the plating.  Plating uniformity, flatness of the top of the wire/blind hole (measuring the flatness of the top of the wire) and the blind hole are characteristics of its performance.  This is especially important in multilayer PCB processing, where inhomogeneity at the lower layer can affect subsequent coatings, damaging the device design and leading to catastrophic consequences such as short circuits.  In addition, uneven surfaces can deform the connection points (i.e., blind holes and routing) and cause signal loss.  Therefore, electroplating solutions that provide even and flat profiles without any special post-treatment are expected by the industry.  

 

 In this article, an innovative composite additive for DC copper plating for IC Substrate is introduced. The embedded groove filling can be realized by improved graphic plating, and the through and blind hole filling can be completed at the same time.  These new products not only provide a better pattern profile, but also can be filled blind holes and electroplated through holes.  We also introduce two kinds of electrolysis copper electroplating processes, which can be selected according to the blind hole size and concave requirements of specific application: Process I can provide good filling for deep blind holes with diameter of 80μm to 120μm and depth of 50μm to 100μm (Figure 1);  The II process is more suitable for small, shallow blind holes with diameters of 50μm to 75μm and depths of 30μm to 50μm.  

 

 These two processes can achieve excellent surface uniformity and line profile (FIG. 2). This article describes blind hole filling and through hole electroplating properties with given parameters within the control range. It also describes how to optimize the heat dissipation and physical characteristics of electroplating metallization  

The process properties of blind hole filling and through hole electroplating can be carried out simultaneously by enhanced graphic electroplating

FIG.1 The process properties of blind hole filling and through hole electroplating can be carried out simultaneously by enhanced graphic electroplating

Embedded groove fill performance to show a high degree of consistency between pad and wire  .png

FIG2 Embedded groove fill performance to show a high degree of consistency between pad and wire




The introduction  


The IC Substrate is the highest level of PCB miniaturization technology, providing the connection between the IC chip and the PCB through an electrical network of conducting copper wires and through holes.  The density of the wires is a key factor in the miniaturization, speed and portability of consumer electronics.  In the past few decades, the linear density has increased greatly, and the development of fan-out panel level Packaging (FOPLP) has become a hot topic in the field of microelectronics to meet the design requirements of today's printed circuits, including thin core materials, precision pattern width, and smaller diameter through and blind holes.  

 

The main drivers driving this new technology are cost and productivity.  Traditional fan-out wafer level packaging (FOWLP) uses 300 mm wafers as production units because obtaining larger wafers is difficult, increases processing steps, labor, and costs, and yields are lower.  The advantage of using PCB-like loaders over wafers is that manufacturers have design flexibility and can use a larger panel area.  For example, a 610 mmx457 mm panel has almost four times the surface area of a 300 mm wafer, greatly reducing the cost, time and processing steps, which is a huge advantage for mass production.  

 

However, the application of FOPLP technology to substrates requires more research and development and faces challenges such as resolution and warping issues.  If successfully implemented, higher volumes, lower costs, and thinner package sizes can be achieved, making consumer electronics faster and lighter.  

 

Acid copper blind hole filling 


Electroplating process is one of the key steps in the production of PCB board. Through the current distribution, the wiring, blind hole and through hole electroplating on PCB board can be realized.  Copper, as the conductive metal of choice, is characterized by its low cost and high conductivity.  With the development of electroplating copper technology in recent decades, the use of copper as electroplating metal has increased greatly.  Advanced specialized circuit board design requires cutting-edge electroplating equipment and innovative electroplating solutions, so in the past decades, jet electroplating equipment has been widely used.  

 

 Electroplating filling solutions are usually high concentrations of copper (200 g/L to 250 g/L copper sulfate) and low concentrations of acid (about 50g/L sulfuric acid) to facilitate rapid filling.  Organic additives are used to control the plating rate and obtain acceptable physical properties. These additives must be carefully designed to meet customer requirements for guide hole fill size, yield, surface copper thickness, plate copper distribution tolerance, and shape of blind holes after plating.  Typical plating formulations include inhibitors, brighteners, and levelers.  In theory, it is possible to fill the blind hole with only a two-component system containing an inhibitor and brightener, but two-component systems have practical problems, such as large depressions, shape filling, and the process is difficult to control analytically.  

 

Both inhibitors and levelers act as inhibitors, but in different ways.  Type I inhibitors such as inhibitors can be deactivated by brighteners, whereas type II inhibitors such as levelers are not, and the carrier is usually a high molecular weight polyoxyalkyl compound.  Usually they adsorb on the cathode surface and form a thin layer by interacting with chloride ions, so the carrier reduces the plating rate by increasing the effective thickness of the diffusion layer.  The energy levels of the cathode surface are equalized (the same number of electrons can be used locally to electroplate all the cathode surface points), resulting in a more uniform distribution of the resulting plating thickness.  

 

Brighteners, on the other hand, increase the plating rate by reducing inhibition. They are usually small molecular weight sulfur-containing compounds, also known as grain refiners.  Leveling agent usually consists of straight chain containing nitrogen/branched polymer and heterocyclic or heterocyclic aromatic compounds, the compounds are usually quaternary structure (center positively charged atoms and four substituent), they will be selective adsorption at high current density, such as edge, Angle and local swelled, prevent excessive plating of copper in high current density area.  

 

The test method


Testing was performed in an 8L electroplating tank and a 200L test tank.  Insoluble anodes are used for higher applicable current density, ease of maintenance, and uniform copper surface distribution.  After the plating solution is configured, the plating solution is sham electroplated at 1Ah/L, analyzed, adjusted to correct additive concentration, and then the plating test is performed. Each test plate is cleaned with acid for 1 minute, washed with water for 1 minute, and pickled with 10% sulfuric acid for 1 minute before plating. 


Operating conditions and plating bath composition  

FIG 1 shows the operating conditions and optimal additive concentrations for the two formulations.  Usually blind hole fill electroplating solutions are high in copper and low in acid to achieve the required hole bottom fill.  

Electroplating bath composition and electroplating conditions .png

FIG1  Electroplating bath composition and electroplating conditions 


Blind hole filling mechanism  

The copper growth rate in the blind hole and on the plate is controlled by additives.  FIG3 shows a schematic diagram of blind hole copper growth, showing the different roles played by each additive.  Selective and non-selective adsorption can occur during electroplating even if the adsorption is locally expanded.  Additives must be controlled within the Settings shown in Table 1 to achieve the required "bottom-up filling".  The analysis can be performed using analytical tools commonly used in industry, such as cyclic voltammetry (CVS) and hall chamber tests.  

 

In FIG3, green represents the inhibitor, red represents the leveling agent, and yellow represents the brightener.  The wetting agent molecules are mainly adsorbed on the surface, inhibiting the electroplating in it, while the leveling agent is selectively adsorbed on the negatively charged area due to the positively charged quaternary amine salt, which can prevent excessive plating on the edge and avoid the premature closure of the blind hole, resulting in the formation of a hole in the center.  Brightener is a small sulfur-containing molecule that diffuses more rapidly into blind holes to accelerate electroplating. Because the geometry of blind holes changes continuously during electroplating, brightener becomes concentrated in the through holes, resulting in rapid electroplating in blind holes. This is called curvature enhanced Accelerator coverage (CEAC) mechanism.  

Schematic diagram of CEAC mechanism .png

FIG3 Schematic diagram of CEAC mechanis

Finally, when the copper plating in the blind hole is nearly coplanar with the surface, the coating rate in the blind hole and on the surface becomes equal, and the bottom-up filling stops.  Depending on the strength of the additive's adsorption and desorption, the brightener may not diffuse as expected, and the high concentration of brightener will continue to accelerate the plating, resulting in an overplating known as "impulse rush."  


Precision Pattern profile measurement  

FIG4 shows the calculation of the profile rate, defined as the ratio between the height difference between the lowest and highest points, expressed as a percentage, and the R value, the height difference between the pad area and the thin line, taking the minimum of both values.

Contour ratio and R value calculation.png

FIG4 Contour ratio and R value calculation


Process design NO.1 was designed to fill the blind holes, resulting in a flat surface and better line profile, and the plating conditions were optimized, as shown in FIG 5.  To obtain the required blind hole filling capacity, a higher concentration of CuSO4 (200g/L) was combined with a lower concentration of sulfuric acid (50g/L).  

Typical electroplating properties.png

FIG5 Typical electroplating properties


The typical properties of the No.1 process are shown in FIG5, where the filled blind hole size is 60 μm×35 μm and the copper thickness is 15μm. Because the NO.1 process can fill the blind hole with the smallest concave surface, no additional flattening steps are required.  The profile ratio is usually in the range of 10% to 15%, however, in some cases it is observed that the actual situation is between 15% and 20%, the copper plating thickness of the wire is 15µm to 16μm, and the R value is between 1 and 2.  The pads are more square in shape and have a flat surface, with the wiring showing a slight dome.  

Filling of 90 μm x 25 μm, 80 μm x 35 μm, 90 μm x 60 μm and 100 μm x80 μm blind holes of different sizes  .png

FIG6 Filling of 90 μm x 25 μm, 80 μm x 35 μm, 90 μm x 60 μm and 100 μm x80 μm blind holes of different sizes  

The filling capacity of the formula for blind holes of different sizes was further evaluated.  Four different blind hole sizes were tested: 90 μm x 25 μm, 80 μm x 35 μm, 90 μm x 60 μm and 100 μm x80 μm respectively. The test results are shown in Figure 6.  For the filling of blind holes below 90 μm×60 μm, no concave surface was observed, while the larger 100 μm×80 μm blind hole had a 4 μm concave surface. 



Study on electroplating solution lifetime  

After initial performance evaluation, the plating solution was aged to 150 Ah/L with a tank volume of 8 L.  Each plating cycle was 15ASF for 45 minutes with the same additive concentration as listed in table 1.  

electroplating solution lifetime  .png

electroplating solution lifetime  


During the bath aging test, the test boards were electroplated at 50Ah/L intervals, and sectioned samples were prepared and evaluated under a microscope.  The test board consists of 60 µm x35 μm blind holes and various L/S routes.  The plating conditions were adjusted to obtain a thickness of about 15 μm on the surface.  During the whole aging process, the wire profile is in the range of 10% to 15%, and occasionally 15% to 20%, which is consistent with the initial performance test results, and the R value of the flat pad electroplating is in the range of 1 to 2.  

 

Test the through-hole filling capacity using boards with thickness of 40μm and 60μm.  The hole diameters of the two circuit boards are 40 μm and 50 μm, respectively. The results are shown in Figure 7. The electroplating period is 1.24ASD, lasting 60 minutes  

Filling capacity of x-shaped holes.png

Filling capacity of x-shaped holes


Tensile strength and elongation  

Two of the most important physical properties in PCB manufacturing are the tensile strength and elongation of the electroplated copper conductor, as these properties indicate the thermal stress the copper metal can withstand during assembly and final use.  Physical properties are the result of a combination of additives including inhibitors, grain refiners and levelers. These properties also depend on plating rate or current density, plating temperature, and crystal morphology. For example, dense deposits of various crystal directions have better physical properties than columnar deposits.  

 

The physical properties were measured according to the 2.4.18.1 test method of IPC TM-650 standard, and then the samples were cut into strip and baked in a 125℃ oven for 4~6 hours. The sample strip was tested with an industrial mechanical test instrument, and the measured value of the instrument was used to calculate the tensile strength and elongation percentage.  Figure 8 shows the results of two different aging bath solutions: the new plating bath and the aging bath of about 100 Ah/L. The results show that the characteristics do not change much with the increase of electroplating time and meet the requirements of IPC standard Level III.  

工艺新电镀液和老化电镀液的物理特性、抗拉强度和延伸率.png