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PCB Blog - Size chip package (SOP), what is the meaning of size chip package (SOP)

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PCB Blog - Size chip package (SOP), what is the meaning of size chip package (SOP)

Size chip package (SOP), what is the meaning of size chip package (SOP)

2022-11-24
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Author:iPCB

Surface Mount. It is developed from pin in line packaging. Its main advantage is that it reduces the difficulty of PCB design and greatly reduces its own size.


We need to insert the integrated circuit packaged by the pin insert into the PCB, so we need to make a special hole in the PCB according to the pin size (FootPrint) of the integrated circuit, so that the main part of the integrated circuit can be placed on one side of the PCB, and at the same time, the pins of the integrated circuit are welded to the PCB on the other side of the PCB to form a circuit connection, so this consumes space on both sides of the PCB.


For multilayer PCB, It is necessary to make room for special holes on each floor during design. The integrated circuit packaged by SMT only needs to be placed on one side of the PCB and welded on the same side without special holes, which reduces the difficulty of PCB design. The main advantage of SMT packaging is to reduce its size, thus increasing the density of IC on PCB. The chip soldered in this way is difficult to remove without special tools. The SMT package can be divided into: Single ended (the pin is on one side), Dual (the pin is on both sides), Quad (the pin is on four sides), Bottom (the pin is below), BGA (the pin is arranged in a rectangular structure) and others according to the position of the pin.


Packaging Form and Technology of MOSFET for Mainboard

Single ended (pins on one side): This packaging type is characterized by all pins on one side, and the number of pins is usually small, as shown in Figure 2. It can also be divided into: Thermal enhanced, like the commonly used power triode, only three pins are arranged in a row, on which there is a large radiator; COF (Chip on Film) is directly attached to a flexible circuit board (Flip chip technology is currently used), and then encapsulated by stop coating. It is light and very thin, so it is currently widely used on liquid crystal displays (LCDs) to meet the needs of increasing LCD resolution. 

SMT.jpg

The disadvantage is that the price of Film is very expensive, and the price of the mounter is also very expensive.

Dual (pins on both sides), as shown in Figure 3. The feature of this packaging type is that all the pins are on both sides, and the number of pins is not too many. It has many packaging types, including SOT (Smalloutline Transistor), SOP (Small Outline Package), SOJ (Small 0outline Package J-bent lea (1), SS() P (Shrink Small 0outline Package), HSOP (Heat sink Small Outline Package) and others.


SOT series mainly include SOT-23, SOT-223, SOT-25, SOT-26, SOT323, SOT-89, etc. When the size of electronic products continues to shrink, the semiconductor devices used inside must also become smaller. Therefore, smaller semiconductor devices enable electronic products to be smaller, lighter, more portable, and contain more functions in the same size. For semiconductor devices, their value is best reflected in the space occupied by PCB and the total package height. Only by optimizing these parameters can they be more compact on a smaller PCB. SOT packaging not only greatly reduces the height, but also significantly reduces the footprint of PCB. For example, SOT883 is widely used in small daily consumer appliances such as mobile phones, cameras and MP3 players.


Small size patch package (SOP: Small 0utline Package). Royal Philips of the Netherlands developed the small size SMD package SOP in the 1970s, and later it gradually derived SOJ (J-pin small footprint package), TSOP (thin small footprint package), VSOP (very small footprint package), SS() P (reduced footprint SOP), TSSOP (thin reduced footprint SOP), SOT (small footprint transistor), SOIC (small footprint integrated circuit), etc. The typical lead spacing of SOP is 1.27 mm, and the number of pins is within dozens.


TSOP (Thin Small Out Line Package) is a TSOP package that appeared in the 1980s. The biggest difference between TSOP and SOP is that its thickness is only 1 mm, which is 1/3 of that of SOJ; Due to the thin and small package on the appearance, it is suitable for high-frequency use, and has conquered the industry with strong operability and high reliability. Most SDRAM memory chips adopt this packaging method. The shape of TSOP memory package is rectangular, and there are I/O pins around the package chip. In the TSOP packaging mode, memory particles are soldered on the PCB through chip pins, and the contact area between the solder joint and the PCB is small, making it relatively difficult for the chip to transfer heat to thePCB design. In addition, when the memory of TSOP package exceeds 150MHz, there will be great signal interference and electromagnetic interference.


Small Out Line J-Led Package. The pins are led out from both sides of the package body in a J shape downward and directly pasted on the surface of the printed circuit board. They are usually plastic products, most of which are used in memory LSI circuits such as DRAM and SRAM, but most of them are DRAM. Many DRAM devices packaged with SOJ are assembled on SIMM. The center distance of the pins is 1.27 mm, and the number of leads is 20-40.