PCB Tech - Signal integrity research: Pay attention to signal rise time

The rise time of the signal is very important for understanding the signal integrity problem. Most of the problems in the high-speed PCB design are related to it, and you must pay enough attention to it.

The signal rise time is not the time it takes for the signal to rise from low to high, but a part of it. The industry's definition of it has not yet been unified. The best way is to follow the definition of upstream chip manufacturers. After all, these giants have the right to speak. There are usually two types: the first is defined as the 10-90 rise time, that is, the time it takes for the signal to rise from 10% of the high level to 90%. The other is the 20-80 rise time, that is, the time it takes for the signal to rise from 20% of the high level to 80%. Both are used, as can be seen from the IBIS model. For the same waveform, the rise time of 20-80 is naturally shorter.

Well, it's enough to understand this. For our terminal applications, the exact number is sometimes not very important, and the chip manufacturer usually does not list this value directly to us. Of course, some chips can roughly estimate this value from the IBIS model. Unfortunately, not every You can find IBIS models for all kinds of chips.

The important thing is that we must establish such a concept: the rise time has an important impact on the circuit performance, as long as it is as small as a certain range, it must attract attention, even if it is a very vague range. There is no need to precisely define this scope standard, and it has no practical meaning. You only need to remember that the current chip processing technology makes this time very short, and it has reached the ps level, and it is time for you to pay attention to his influence.

As the signal rise time decreases, problems such as reflection, crosstalk, rail collapse, electromagnetic radiation, and ground bounce become more serious, and noise problems are more difficult to solve. The design solutions of the previous generation of products may not be applicable to this generation of products.

The decrease in signal rise time, from the perspective of spectrum analysis, is equivalent to an increase in signal bandwidth, that is, there are more high-frequency components in the signal. It is these high-frequency components that make the design difficult. Interconnect lines must be treated as transmission lines, which creates many problems that were not there before.

Therefore, to learn signal integrity, you must have this concept: the steep rising edge of the signal is the culprit of signal integrity problems.