PCB Tech - What is high-speed PCB design

1. Challenges faced by electronic system design

With the large-scale improvement of system design complexity and integration, electronic system designers are engaged in printed circuit boards design of more than 100MHZ, and the working frequency of bus has reached or exceeded 50MHZ, and some even exceeded 100MHZ. About 50% of current designs have clock frequencies greater than 50MHz, and nearly 20% have clock frequencies greater than 120MHz.

When the system works at 50MHz, transmission line effect and signal integrity problems will occur. When the system clock reaches 120MHz, PCB designs based on traditional methods will not work unless high-speed circuit design knowledge is used. Therefore, high speed circuit design technology has become the electronic system designers must take the design means. Only by using the design techniques of high-speed circuit designers can the design process be controlled.

2. What is high-speed circuit

It is generally considered that if the digital logic circuit frequency reaches or exceeds 45MHZ~50MHZ, and the circuit operating above this frequency has accounted for a certain amount of the entire electronic system (say, 1/3), it is called high-speed circuit.

In fact, the harmonic frequency of the edge of the signal is higher than that of the signal itself. It is the rising edge and falling edge (or jump of the signal) that causes the unexpected result of signal transmission. Therefore, it is generally agreed that if the line propagation delay is greater than the rise time of the driving end of 1/2 digital signal, such signal is considered to be high-speed signal and produce transmission line effect.

Signal transmission occurs at the moment when the state of the signal changes, such as the time of rise or fall. The signal passes through a fixed period of time from the driver to the receiver. If the transmission time is less than 1/2 of the rise or fall time, the reflected signal from the receiver will reach the driver before the signal changes state. Conversely, the reflected signal will arrive at the driver after the signal changes state. If the reflected signal is strong, the superimposed waveform may change the logical state.

3. Determination of high-speed signals

Above we have defined the preconditions for the occurrence of transmission line effect, but how to know whether the line delay is greater than 1/2 of the signal rise time of the driver? In general, the typical value of the signal rise time can be given in the device manual, and the signal travel time in PCB design is determined by the actual wiring length. The figure below shows the correspondence between signal rise time and allowable wiring length (delay).

The delay per unit inch on the PCB is 0.167ns. However, if there are many holes, pins, and constraints on the network cable, the delay will increase. Typically, the signal rise time for high-speed logic devices is about 0.2ns. If there is GaAs chip on the board, the large wiring length is 7.62mm.

Set Tr as signal rise time and Tpd as signal line propagation delay. If Tr≥4Tpd, the signal falls in the safe zone. If 2Tpd≥Tr≥4Tpd, the signal falls in the uncertainty region. If Tr≤2Tpd, the signal falls in the problem area. For signals falling in uncertain and problem areas, high-speed wiring methods should be used.

4. What is transmission line

The wiring on the PCB board can be equivalent to the series and parallel capacitance, resistance and inductance structure shown below. Typical values for series resistances are 0.25-0.55 ohms/foot. Parallel resistances are usually very high because of the insulation layer. After the parasitic resistance, capacitance, and inductance are added to the actual PCB wiring, the final impedance on the wiring is called the characteristic impedance Zo. The wider the wire diameter, the closer it is to the power/ground, or the higher the dielectric constant of the isolation layer, the smaller the characteristic impedance. If the impedance of the transmission line and the receiving end do not match, the output current signal and the final stable state of the signal will be different, which causes the signal to be reflected at the receiving end, which will be sent back to the signal transmitter and reflected back again. As the energy decreases, the amplitude of the reflected signal will decrease until the voltage and current of the signal stabilize. This effect is called oscillations, and oscillations of the signal are often seen at the rising and falling edges of the signal.

5. Transmission line effect

Based on the transmission line model defined above, it can be concluded that the transmission line will have the following effects on the overall circuit design.

· Reflected signals Reflected signals

· Delay & Timing errors

· Multiple logic level threshold crossing errors False Switching

· Overshoot and Undershoot

· Induced Noise (or crosstalk)

· EMI radiation

5.1 Reflected Signal

If a line is not terminated correctly (terminal matching), the signal pulse from the driver is reflected at the receiver, causing an unexpected effect that distorts the signal profile. When the distortion distortion is very significant, it can lead to a variety of errors, resulting in design failure. At the same time, the distortion of the signal to noise sensitivity increased, will also cause design failure. If the above situation is not considered enough, EMI will increase significantly, which will not only affect the design results, but also cause the failure of the whole system.

The main causes of reflected signals are as follows: too long wiring; Unmatched terminated transmission lines, excess capacitance or inductance, and impedance mismatches.

5.2 Delay and timing errors

Signal delay and timing errors are: the signal remains unchanged for a period of time when the signal changes between the high and low thresholds of the logic level. Excessive signal delay may lead to timing errors and device dysfunction.

Problems usually occur when there are multiple receivers. The circuit designer must determine the time delay in the bad case to ensure the design is correct. Cause of signal delay: The driver is overloaded and the cable is too long.

5.3 Multiple Logic level crossing threshold Errors

The signal may cross the logical level threshold several times during hopping, resulting in this type of error. Multiple crossing the logic level threshold error is a special form of signal oscillation, that is, signal oscillation occurs near the logic level threshold, multiple crossing the logic level threshold will lead to logic dysfunction. Reflected signals are caused by: too long wiring, unterminated transmission lines, excess capacitance or inductance, and impedance mismatches.

5.4 Overshoot and downshoot

Overshoot and downshoot come from two reasons: too long line or signal change too fast. Although most element receivers are protected by input protection diodes, sometimes these overshoot levels can exceed the supply voltage range of the element, damaging the element.

5.5 crosstalk

Crosstalk means that when a signal passes through one signal line, relevant signals will be induced on the adjacent signal lines on the PCB board, which is called crosstalk.

The closer the signal cable is to the ground cable, the larger the distance between the lines is, and the smaller the crosstalk signal is generated. Asynchronous signals and clock signals are more prone to crosstalk. Therefore, the method of eliminating crosstalk is to remove the crosstalk signal or shield the seriously disturbed signal.

5.6 Electromagnetic Radiation

Electro-Magnetic Interference (EMI), which causes excessive electromagnetic radiation and sensitivity to electromagnetic radiation. EMI indicates that when a digital system is powered on, it radiates electromagnetic waves to the surrounding environment, thus interfering with the normal operation of electronic devices in the surrounding environment. The main reason is that the circuit working frequency is too high and the layout and wiring is unreasonable. At present, there are software tools for EMI simulation, but EMI emulators are very expensive and it is difficult to set simulation parameters and boundary conditions, which will directly affect the accuracy and practicability of simulation results. The common practice is to apply the design rules controlling EMI to each link of the design to realize the rule driving and control in each link of the design.