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How to reduce the welding voids and defects of various IC chips on PCBA circuit boards
2021-10-03
View:39
Author:Frank

How to reduce the welding voids and defects of various IC chips on PCBA circuit boards
After the soldering of hardware PCBA electronic products is introduced into the lead-free process, due to the characteristics of lead-free solder, such as high melting point, poor wettability, narrow process window, etc., the soldering process has unique defects and defects of lead-free soldering, such as tin beads and solder joints. Roughness, missing solder, little tin, and voids.
  
   It is well known that voids are formed when soldering large flat and low-foot height components, such as QFN components. The use of these types of components is increasing. In order to meet the IPC standards, the formation of voids makes many PCB circuit board designers, PCBA soldering EMS foundries and quality control personnel feel a headache.
  
   The parameters for optimizing void performance are usually the chemical composition of the solder paste, the reflow temperature profile, the coating of the substrate and components, and the optimal design of the pad and the SMT stencil template. However, in practice, changing these parameters has obvious limitations. Despite a lot of efforts to optimize, but still often see too high void rate level.
  
The root cause of solder voids is that the air or volatile gas wrapped in the solder paste is not completely discharged after the solder paste is melted. The influencing factors include solder paste material, solder paste printing shape, solder paste printing volume, reflow temperature, reflow time, solder size, structure Wait.
  
   IC chip packaging technology types: LGA, PGA, BGA
  
  

pcb board

As an SMT engineer in the electronics manufacturing industry, if you do not master the SMT surface assembly process, it is difficult to analyze and improve the process. Before understanding the assembly process, you need to master the packaging structure of surface mount components. The package structure and assembly process are analyzed in detail.
  
  IC chip and electronic components packaging structure
  
  SMT surface mount component package type classification Surface mount component (SMD) package is the object of surface mount. Understanding the package structure of SMD is of great significance for optimizing the SMT process. The package structure of SMD is the basis of process design. Therefore, here we are not classified by the name of the package but by the structure of the pin or the solder end. According to this division, SMD packages mainly include chip components (Chip), J-shaped pin, L-shaped pin, BGA, BTC, and castle.
  
  BGA package introduction:
  
1. BGA package (Ball Grid Array), according to its structure, mainly includes plastic package BGA (P-BGA), flip-chip BGA (F-BGA), carrier tape BGA (T-BGA) and ceramic BGA (C-BGA) ) Four categories.
  
The bottom solder terminal device BTC on the road board is widely used, such as special devices such as ball array devices (BGA/CSP/WLP/POP) and QFN/LLP. The BTC package is listed in the BTC package listed in IPC-7093 There are QFN (Quad Flat No-Lead package), SON (SmallOutline No-Lead), DFN (Dual Flat No-Lead), LGA (land Grid Array), MLFP (Micro Leadframe Package).
  
   Among them, QFN is a leadless package, which is square or rectangular. There is a large exposed pad at the center of the bottom of the package for heat conduction, and electrical connection is achieved through the large pads on the periphery of the package. Because there is no lead, the mounting area is smaller than QFP, and the height is lower than QFP. Coupled with outstanding electrical and thermal performance, this kind of package is increasingly used in the electronics industry.
  
   QFN heat sink pad void control is one of the problems of QFN welding process, and it is also one of the problems in the industry.
  
   As small-size packages are more capable of carrying high-power chips, bottom terminal component packages such as QFN are becoming more and more important. As the requirements for reliability performance continue to increase, it is essential to optimize thermal and electrical performance for power management components in packages such as QFN. In addition, to maximize speed and RF performance, reducing voids is very important to reduce the current path of the circuit. As the package size shrinks and power requirements increase, the market requires the reduction of voids under the thermal pads of QFN components. Therefore, it is necessary to evaluate the key process factors that generate voids and design the best solution.
  
The QFN package has excellent thermal performance, mainly due to the large-area heat dissipation pad at the bottom of the package. In order to effectively conduct heat from the chip to the PCB, the bottom of the PCB must be designed with corresponding heat dissipation pads and heat dissipation vias. The heat-dissipating pad provides a reliable soldering area, and the vias provide a way to dissipate heat. Therefore, when the exposed pads on the bottom of the chip are soldered to the thermal pads on the PCB, the gas in the solder paste on the thermal vias and the large-size pads will overflow, resulting in certain gas holes. For the smt process In terms of large cavities, it is almost impossible to eliminate these pores. The only way to reduce the pores is to minimize them.
  
The full name of LGA is "land grid array", or "planar grid array package", that is, a package with array state electrode contacts made on the bottom surface. Its shape is very similar to that of BGA components, because its land size is larger than that of BGA balls. The diameter is about 2 to 3 times larger, and it is also difficult to control the voids. And it is the same as QFN components, the industry has not formulated relevant process standards, which caused trouble to the electronic processing industry to a certain extent.
  
  The full name of BGA is called "ball grid array", or "ball grid array package". At present, the vast majority of intel mobile CPUs use this packaging method, for example, all intel processors ending in H, HQ, U, Y, etc. (including but not limited to low voltage).
  
BGA can be the extreme product of LGA and PGA, which is different from the feature that they can be replaced at will. Once the BGA is packaged, it is impossible for ordinary players to disassemble and replace it in a normal way, but because it is done at one time. , So BGA can be made shorter and smaller.
  
The main defects of BGA chip solder joints are: voids, desoldering (open circuit), bridging (short circuit), internal cracks in the solder ball, solder joint disturbance, cold soldering, incomplete solder ball melting, and displacement (the solder ball is not aligned with the PCB pad ), solder beads, etc.