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PCB Tech
Introduction to parasitic capacitance in PCB layout
PCB Tech
Introduction to parasitic capacitance in PCB layout

Introduction to parasitic capacitance in PCB layout


A PCB board is composed of multiple conductors connected in parallel, such as traces, separated by insulators. These traces together with the dielectric material form a capacitor, resulting in unwanted parasitic capacitance or stray capacitance effects.

The parasitic elements in the PCB may be parasitic capacitance, parasitic resistance, and parasitic inductance. When the traces are close, the parasitic capacitance effect is particularly prominent in the high-frequency board. This effect is completely unnecessary and will affect the function of the device. It can cause problems such as crosstalk, EMI, and signal integrity. PCB designers dealing with high-frequency, high-data-rate, and mixed-signal boards must consider parasitic capacitance and inductance effects when designing the PCB layout.

In the following section, we will understand the definition of parasitic capacitance and its impact on our circuit boards.

What is the parasitic capacitance in the PCB?

The tightly placed PCB conductors form a virtual capacitor, which creates a parasitic capacitance effect.

Parasitic capacitance or stray capacitance is the result of a virtual capacitor formed between two traces separated by a dielectric. It occurs due to the potential difference generated when the current-carrying traces are close. To learn more, read the role of line current capacity in PCB design.

pcb board

This effect is even possible if the conductors are properly insulated. Since there is no ideal circuit, parasitic capacitance cannot be avoided.

The charge and discharge cycle in the capacitor.

Parasitic capacitance is an inherent characteristic of conductors. It is the amount of storage per unit potential change. The calculation formula of parasitic capacitance is C= q/v. Where C is the capacitance in farads, v is the voltage in volts, and q is the charge in coulombs.

For a constant electrical signal that does not change with time, dv/dt = 0, which means that there is no change in potential; therefore, i = 0.

If there is a capacitor in the circuit loop, dv/dt will converge to a fixed value, that is, the potential changes and current is generated; therefore, i≠0.

Trace capacitance calculation

The capacitance of the parallel plate capacitor is given by C= (kA/11.3d)pF. Where C is the capacitance, A is the area of the plate in cm 2, k is the relative permittivity of the plate material, and d is the distance between the plates in cm.

Modeling of PCB parasitic components at high frequencies.

The parasitic capacitance effect is a problem in high-frequency circuit boards. In low-frequency operation, parasitic components can be ignored because they will not really affect system function. Each pad on the circuit board has its parasitic capacitance, and each trace has parasitic inductance. The pad also increases parasitic resistance, which stimulates IR loss. Parasitic capacitance may exist between the PCB, bare board, PCBA, assembly board, and conductors in the component package, especially surface mount devices (SMD).

Since the intrinsic capacitor plates have a potential difference, there is an opportunity for current to flow. It does not matter whether charge is stored between the capacitor plates; current will not flow until there is a potential difference. Once this potential difference increases, a corresponding decrease in the flow of electrons to the load can be observed for the desired signal path that negatively affects the signal integrity.

What is the difference between stray capacitance and parasitic capacitance?

The term stray capacitance is often used interchangeably with parasitic capacitance. However, parasitic capacitance shows that it will hinder circuit operation, and stray capacitance shows how to introduce unwanted capacitance.

What is stray capacitance?

Due to the virtual capacitance formed between the two PCB conductors and due to the influence of the surrounding environment, stray capacitance is not always sensed. Therefore, it is called stray capacitance.

What is the parasitic resistance in PCB?

Parasitic resistances are connected in series along the traces or exist as shunts between conductive elements.

What is the parasitic inductance in the PCB?

Parasitic inductances exist along the traces, exhibiting the behavior of storing and dissipating electrical energy, just like actual inductors. All conductors are inductive, and at high frequencies, the inductance of even relatively short wires or PCB traces can be important.

Parasitic capacitance effects can be crosstalk and noise, poor feedback from the output, and the formation of resonant circuits. Therefore, attention must be paid to the overall PCB design, especially the layout. When placing a conductor next to another conductor, a good layout should be done with extreme care.

Parasitic elements include inductances formed by package leads, long traces, pad-to-ground, pad-to-power plane, and pad-to-line capacitors, including interactions with vias. Understand parasitic elements as parasitic elements, which pose a threat to your circuit performance. Unwanted and inevitable, but at the same time controllable.

In high-speed circuits, a few tenths of a picofarad is enough to affect circuit performance. For example, a 1pF parasitic capacitance at the inverting input will cause a 2dB peak in the frequency domain. If it exceeds 1pF, it will cause instability and oscillation.

Capacitors block low-frequency and DC signals and pass high-frequency signals in electronic circuits. This characteristic of capacitors passing high-frequency signals (the speed at which capacitors discharge is another reason they are used to replace much slower batteries) is the cause of stray capacitance problems in high-speed circuits. For conductors, stray capacitance can introduce EMI or noise, which can propagate along wires and cables or be transferred to nearby adjacent traces. Usually, it is impossible to eliminate stray capacitance. Nevertheless, there are some effective methods to alleviate this situation at the PCB layout level.

Avoid parallel routing: When routing parallel, there is the largest area between the two metals, so there is the largest capacitance between them.