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PCB Tech

Summary and cause analysis of high-speed PCB design rules
2021-08-20
View:49
Author:IPCB

1. The pcb clock frequency exceeds 5MHZ or the signal rise time is less than 5ns, generally a multilayer board design is required.

Reason: The area of signal loop can be well controlled by adopting multi-layer board design.


2. For multilayer boards, the key wiring layer (the layer where the clock line, bus, interface signal line, radio frequency line, reset signal line, chip select signal line and various control signal lines are located) should be adjacent to the complete ground plane, preferably Between two ground planes.

Reason: The key signal lines are generally strong radiation or extremely sensitive signal lines. Wiring close to the ground plane can reduce the signal loop area, reduce the radiation intensity or improve the anti-interference ability. `


3. For single-layer boards, both sides of the key signal lines should be covered with ground.

Reason: The key signal is covered with ground on both sides, on the one hand, it can reduce the area of the signal loop, and on the other hand, it can prevent the crosstalk between the signal line and other signal lines.


4. For double-layer boards, a large area of ground is laid on the projection plane of the key signal lines, or the ground is punched like a single board.

Reason: the same as the key signal of the multilayer board is close to the ground plane.


5. In a multilayer board, the power plane should be retracted by 5H-20H relative to its adjacent ground plane (H is the distance between the power supply and the ground plane).

Reason: The indentation of the power plane relative to its return ground plane can effectively suppress the edge radiation problem.


6. The projection plane of the wiring layer should be in the area of the reflow plane layer.

Reason: If the wiring layer is not in the projection area of the reflow plane layer, it will cause edge radiation problems and increase the signal loop area, resulting in increased differential mode radiation.


7. In the multi-layer board, the TOP and BOTTOM layers of the single board should not have signal lines larger than 50MHZ as far as possible.

Reason: It is best to walk the high-frequency signal between the two plane layers to suppress its radiation to the space.


8. For a single board with a board-level operating frequency greater than 50MHz, if the second layer and the penultimate layer are wiring layers, the TOP and BOOTTOM layers should be covered with grounded copper foil.

Reason: It is best to walk the high-frequency signal between the two plane layers to suppress its radiation to the space.


9. In multi-layer boards, the main working power plane of the single board (the most widely used power plane) should be in close proximity to its ground plane.

Reason: The adjacent power plane and ground plane can effectively reduce the loop area of the power circuit.


10. In a single-layer board, there must be a ground wire next to and parallel to the power trace.

Reason: reduce the area of the power supply current loop.


11. In a double-layer board, there must be a ground wire next to and parallel to the power supply line.

Reason: reduce the area of the power supply current loop.


12. In the layered design, try to avoid the adjacent setting of the wiring layer. If it is unavoidable that the wiring layers are adjacent to each other, the layer spacing between the two wiring layers should be appropriately increased, and the layer spacing between the wiring layer and its signal circuit should be reduced.

Reason: Parallel signal traces on adjacent wiring layers can cause signal crosstalk.


13. Adjacent plane layers should avoid overlapping of their projection planes.

Reason: When the projections overlap, the coupling capacitance between the layers will cause the noise between the layers to couple with each other.


14. When designing the PCB layout, fully comply with the design principle of placing in a straight line along the signal flow direction, and try to avoid looping back and forth.

Reason: Avoid direct signal coupling and affect signal quality.


15. When multiple module circuits are placed on the same PCB, digital circuits and analog circuits, and high-speed and low-speed circuits should be laid out separately.

Reason: Avoid mutual interference between digital circuits, analog circuits, high-speed circuits, and low-speed circuits.


16. When there are high, medium, and low speed circuits on the circuit board at the same time, follow the high and medium speed circuits and stay away from the interface.

Reason: Avoid high-frequency circuit noise from radiating to the outside through the interface.


17. Energy storage and high-frequency filter capacitors should be placed near unit circuits or devices with large current changes (such as power supply modules: input and output terminals, fans and relays).

Reason: The existence of energy storage capacitors can reduce the loop area of large current loops.

ATL

18. The filter circuit of the power input port of the circuit board should be placed close to the interface.

Reason: to avoid re-coupling the line that has been filtered.


19. On the PCB, the filtering, protection and isolation components of the interface circuit should be placed close to the interface.

Reason: It can effectively achieve the effects of protection, filtering and isolation.


20. If there is both a filter and a protection circuit at the interface, the principle of first protection and then filtering should be followed.

Reason: The protection circuit is used for external overvoltage and overcurrent suppression. If the protection circuit is placed after the filter circuit, the filter circuit will be damaged by overvoltage and overcurrent.


21. During layout, ensure that the input and output lines of the filter circuit (filter), isolation and protection circuit do not couple with each other.

Reason: When the input and output traces of the above circuit are coupled with each other, the filtering, isolation or protection effect will be weakened.


22. If a "clean ground" interface is designed on the board, the filtering and isolation devices should be placed on the isolation band between the "clean ground" and the working ground.

Reason: Avoid coupling of filtering or isolation devices to each other through the plane layer to weaken the effect.


23. Except for filtering and protection devices, no other devices can be placed on the "clean ground".

Reason: The purpose of the "clean ground" design is to ensure that the interface radiation is minimal, and the "clean ground" is easily coupled by external interference, so there should be no other irrelevant circuits and devices on the "clean ground".


24. Keep strong radiation devices such as crystals, crystal oscillators, relays, switching power supplies, etc. away from the board interface connector at least 1000 mils.

Reason: The interference will radiate directly or the current will be coupled to the outgoing cable to radiate outward.


25. Sensitive circuits or devices (such as reset circuits, WATCHDOG circuits, etc.) should be at least 1000 mils away from the edges of the board, especially the edge of the board interface.

Reason: places similar to single-board interfaces are the places most easily coupled by external interference (such as static electricity), and sensitive circuits like reset circuits and watchdog circuits can easily cause system misoperation.


26. The filter capacitors for IC filtering should be placed as close as possible to the power supply pins of the chip.

Reason: The closer the capacitor is to the pin, the smaller the area of the high-frequency loop and the smaller the radiation.


27. For the start-end series matching resistor, it should be placed close to its signal output end.

Reason: The design purpose of the starting-end series matching resistor is to add the output impedance of the chip output end and the impedance of the series resistance to the characteristic impedance of the trace. The matching resistance is placed at the end, which cannot satisfy the above equation.


28. PCB traces cannot have right-angle or acute-angle traces.

Reason: Right-angle wiring leads to discontinuity in impedance, leading to signal transmission, resulting in ringing or overshoot, and strong EMI radiation.


29. Avoid the layer setting of adjacent wiring layers as much as possible. When it is unavoidable, try to make the traces in the two wiring layers perpendicular to each other or the length of parallel traces is less than 1000mil.

Reason: to reduce the crosstalk between parallel traces.


30. If the board has an internal signal wiring layer, the key signal lines such as clocks should be laid on the inner layer (the preferred wiring layer is preferred).

Reason: Deploying key signals on the internal wiring layer can play a shielding role.


31. It is recommended to cover the ground wire on both sides of the clock line, and the ground wire shall be grounded every 3000mil.

Reason: Ensure that the potentials of all points on the ground line of the package are equal.

 

32. Key signal traces such as clocks, buses, and radio frequency lines and other parallel traces on the same layer should meet the 3W principle.

Reason: Avoid crosstalk between signals.


33. The pads of surface mount fuses, magnetic beads, inductors, and tantalum capacitors used for power supplies with current ≥ 1A should not be less than two vias connected to the plane layer.

Reason: Reduce the equivalent impedance of the via.


34. Differential signal lines should be on the same layer, equal length, and run in parallel, keeping the impedance uniform, and there should be no other wiring between the differential lines.

Reason: to ensure that the common mode impedance of the differential line pair is equal to improve its anti-interference ability.


35. The key signal traces must not cross the partitioned area (including the reference plane gap caused by vias and pads).

Reason: The wiring across the partition will increase the area of the signal loop.


36. When it is unavoidable to divide the signal line across its return plane, it is recommended to use a bridge capacitor approach near the signal span division. The value of the capacitor is 1nF.

Reason: When the signal span is divided, the loop area is often increased. The bridge grounding method is artificially set up for the signal loop. .


37. Do not have other irrelevant signal traces under the filter (filter circuit) on the board.

Reason: Distributed capacitance will weaken the filtering effect of the filter.


38. The input and output signal lines of the filter (filter circuit) cannot be parallel or crossed.

Reason: Avoid direct noise coupling between the traces before and after filtering.


39. The distance between the key signal line and the edge of the reference plane is ≥3H (H is the height of the line from the reference plane).

Reason: suppress the edge radiation effect.


40. For metal shell grounding components, ground copper should be laid on the top layer of the projection area.

Reason: The distributed capacitance between the metal shell and the grounded copper is used to suppress the external radiation and improve the immunity.


41. In the single-layer board or double-layer board, pay attention to the design of "minimizing loop area" when wiring.

Reason: The smaller the loop area, the smaller the loop's external radiation, and the stronger the anti-interference ability.


42. When the signal line (especially the key signal line) is changed layer, the ground via should be designed near the layer change via hole.

Reason: The area of the signal loop can be reduced.


43. Clock lines, bus lines, radio frequency lines, etc.: The strong radiation signal lines are far away from the signal lines out of the interface.

Reason: Avoid the interference of strong radiation signal lines from coupling to outgoing signal lines and radiating outwards.


44. Sensitive signal lines such as reset signal lines, chip select signal lines, system control signals, etc. are far away from the signal lines out of the interface.

Reason: The signal line going out of the interface often brings in external interference, and when it is coupled to the sensitive signal line, it will cause the system to malfunction.


45. In single and double panels, the routing of the filter capacitor should be filtered by the filter capacitor first, and then to the device pins.

Reason: The power supply voltage is filtered before supplying power to the IC, and the noise fed back by the IC to the power supply will also be filtered out by the capacitor.


46. In a single or double panel, if the power line is very long, decoupling capacitors should be added to the ground every 3000mil, and the value of the capacitor is 10uF+1000pF.

Reason: filter out high frequency noise on the power line.



47. The ground wire and power wire of the filter capacitor should be as thick and short as possible.

Reason: The equivalent series inductance will reduce the resonant frequency of the capacitor and weaken its high-frequency filtering effect