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PCB News - PCB board design layer arrangement

PCB News

PCB News - PCB board design layer arrangement

PCB board design layer arrangement

2021-11-04
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Author:Kavie

The hierarchical arrangement of the circuit board has a considerable relationship with the frequency of the system and the huge wiring of the system. Because of the huge EMI and wiring, 10-layer wiring is used. The EMI rules in the wiring from two to eight layers will be described in detail below.


PCB board


6.1 Hierarchical arrangement of two-layer boards

1) Two-layer circuit boards are mainly used in low-speed circuits, with operating frequencies below 10KHZ or in analog circuits, where the stacking level is relatively small and the cost is low.

2) The Power Trace of the two-layer board is wired on the same layer in a radial pattern, from the power supply to each component, reducing the length of all traces.

3) The grid-like distribution of Power and GND in the two-layer board (distributed in TOP and BOTTOM), because power noise will go in the direction of low impedance. Look for the direction of low impedance from the source of the power source, and return to the NOISE. The source forms a loop. The grid-like distribution even if all POWER and GND are adjacently wired in parallel, this can minimize the loop of noise from high-frequency switching, and thus will not affect other circuits and control signals.

4) Another wiring method for the two-layer board is to use one layer of POWER and signal, and GND on the other layer, which can be used when the wiring is not dense.

2 Hierarchical arrangement of four-layer boards

Generally adopted hierarchical arrangement: TOP and BOTTOM are signal layers, layer 2 is GND, and layer 3 is POWER. The distribution of the 2nd and 3rd floors depends on the specific situation. Which layer should have more wiring, and the adjacent layer shall be regarded as the ground layer.

Four-layer boards are used in medium and low-speed lines (below 75M), because there will be a lot of noise on the POWER layer. Therefore, it is not as good as the GND layer as a reference plane.

If the TOP layer of the four-layer board goes with a high-speed signal exceeding 66MHZ, the high-frequency radiation will radiate to the surroundings, and GND must be placed on the organization or TOP layer to eliminate the radiation.

If the shell is a metal shell, the high-speed signal lines and clock lines should be placed on a layer close to the plane of the shell. It is best to route the ground wire around the clock line with a width of 1 to 2 times the clock. It is as wide as the clock line. If the line is too long, a ground hole should be punched at a distance of about 1000 mils to enhance the connection between the long ground line and the ground and ensure a good shielding effect.

IMAGE THEORY:

If a conductor with current is parallel and adjacent to a metal plane, an image current with the same magnitude and opposite direction as the conductor current will be induced on the metal plane to counteract the radiation field caused by the conductor current. If it is perpendicular to an adjacent metal plane, The image current is equal in magnitude and in the same direction. So follow IMAGE THEORY, if the signal frequency is very high. It is best to complete the wiring on the same layer.

3 Hierarchical arrangement of six-layer boards

Method 1: Signal layer 1 is the safest wiring method

Layer 1: Signal layer 1.

The second layer: the ground cortex.

Layer 3: Signal Layer 2.

Layer 4: Signal Layer 3.

Layer 5: Power layer.

Layer 6: Signal Layer 4.

The signal layer 2, 3, and 4 layers have poor noise margins because the amount of the POWER PLAN magnetic field will move through the signal layers 2, 3 to GND PLANE. POWER and GND PLANE are not adjacent, resulting in increased impedance. Signal layer 3 and 4 FLUX CANCELLATION are poor, signal layer 2 and 3 have concerns about CROSSTALK.

Since the noise will automatically select the loop with the lowest impedance, signal lines and clock lines with high frequency and strong radiation should be as close as possible to the GND layer.

Because the power layer has different divisions such as 3V, 5V, 12V, the power layer is a broken metal plane, which is why it is not as good as GND as a reference plane. Therefore, the wiring of CLK, SIGNAL, and CRYSTAL should be close to the GND layer, which is the first layer.

Since the noise of POWER will string to the GND layer and then flow back to the POWER layer, the noise will oscillate back and forth between the two layers. The resonance is caused by POWER and GND, generally between 30-230MHZ, and POWER and GND should be processed. Eliminate this frequency bandwidth. The method is mainly to eliminate the noise source and improve the signal waveform; add a capacitor (connected between POWER and GND) near the high-frequency signal to filter the noise from the capacitor.

Way two:

Layer 1: Signal layer 1.

Layer 2: Signal Layer 2.

The third layer: the ground cortex.

Layer 4: Power layer.

Layer 5: Signal Layer 3.

Layer 6: Signal Layer 4.

The signal layer 2 is adjacent to the GND layer and has a good FLUX CANCELLATION due to the image theorem.

The POWER and GND layers are adjacent to reduce the impedance of the POWER layer.

The signal layer 1, 3, and 4 have poor FLUX CANNCELLATION, and there are concerns about CROSSTALK.

If the POWER plane has a good reference plane, you should choose method 1, because POWER GND is a good reference plane, and there are many layers of high-speed lines. If the POWER layer is broken, you should choose method 2. At the same time, the second method can be remedied by using cloth GND copper on the signal layer 1 and 4 layers.

Method three: (best stacking method)

Layer 1: Signal layer 1.

The second layer: the ground cortex.

Layer 3: Signal Layer 2.

Layer 4: Power layer.

Layer 5: Signal Layer 3.

Layer 6: Signal Layer 4.

The signal layer 1 and 2 are adjacent to the GND layer and have good FLUX CANCELLATION.

In order to avoid the influence of the power noise of the signal layer, the medium distance should be increased between the power layer and the signal layer 2, which can reduce the inter-layer interference.

Summary: For high-speed signals, it is best to only punch through holes in the top and low layers, and it is best to only go through one layer in the middle. The existing layers are distributed as follows:

Layer 1: Signal layer 1.

The second layer: the ground cortex.

Layer 3: Power layer.

Layer 4: Signal Layer 2.

The fifth layer: the ground cortex.

Layer 6: Signal Layer 3.

Note: The signal layer and POWER layer should be smaller than the GND layer by more than 20H (H is the POWER GND layer spacing), which can reduce 70% of the board edge radiation. For our current products, I suggest that the signal layer and POWER layer should be more than 3 mm smaller than the GND layer.

4 The best arrangement of the eight-layer board

Layer 1: Signal layer 1.

The second layer: the ground cortex.

Layer 3: Signal Layer 2.

The fourth layer: the ground cortex.

Layer 5: Power layer.

Layer 6: Signal Layer 3.

The seventh layer: the ground cortex.

Layer 8: Signal Layer 4.

There are two ways: G2P7 and G3P6.

Disadvantages: POWER impedance increases, which can deploy more high-speed signal layers, which will cause crosstalk between adjacent signal layers.

5 Determine the number of PCB layers before routing

The number of wiring layers needs to be determined early in the design. If the design requires the use of high-density ball grid array (BGA) components, the minimum number of wiring layers required for wiring these devices must be considered. The number of wiring layers and the stack-up method will directly affect the wiring and impedance of the printed lines. The size of the board helps determine the stacking method and the width of the printed line to achieve the desired design effect.

For many years, people have always believed that the lower the number of layers of the circuit board, the lower the cost, but there are many other factors that affect the manufacturing cost of the circuit board. In recent years, the cost difference between multilayer boards has been greatly reduced. It is best to use more circuit layers and evenly distribute the copper at the beginning of the design, so as to avoid discovering that a small number of signals do not meet the defined rules and space requirements until the end of the design, so that new layers are forced to be added. Careful planning before designing will reduce a lot of troubles in wiring.

The above is an introduction to the layer arrangement of PCB design. Ipcb is also provided to PCB manufacturers and PCB manufacturing technology.