PCB Tech - Commonly used board-level signal integrity analysis models

In order to carry out circuit simulation, the model of the components must be established first, that is, for the various components supported by the circuit simulation program, there must be corresponding mathematical models in the simulation program to describe them, that is, the calculation formula that can be operated by the computer To express them.

An ideal component model should not only accurately reflect the electrical characteristics of the component, but also be suitable for numerical solution on a computer. Generally speaking, the higher the accuracy of the device model, the more complex the model itself, and the greater the number of model parameters required. In this way, the amount of memory occupied during calculation increases, and the calculation time increases. However, integrated circuits often contain a huge number of components, and a small increase in the complexity of the device model will double the calculation time. Conversely, if the model is too rough, the analysis results will be unreliable. Therefore, the complexity of the component model used should be determined according to actual needs.

In the PCB design method based on signal integrity computer analysis, the most core part is the establishment of the PCB board-level signal integrity model, which is different from the traditional design method. The correctness of the SI model will determine the correctness of the design, and the buildability of the SI model determines the feasibility of this design method.

At present, there are two methods for constructing device models: one is to start from the electrical working characteristics of the components, treat the components as a'black box', measure the electrical characteristics of its ports, and extract the device model without involving the working principle of the device., Called the behavioral model. Representatives of this model are the IBIS model and S-parameters. Its advantages are that it is simple and convenient to model and use, save resources, and has a wide range of applications. Especially in the case of high frequency, nonlinearity, and high power, the behavioral model is almost the only choice. The disadvantage is that the accuracy is poor, the consistency cannot be guaranteed, and it is affected by the test technology and accuracy. The other is based on the working principle of the component. Starting from the mathematical equation of the component, the obtained device model and model parameters are closely related to the physical working principle of the device. The SPICE model is the most widely used of this model. Its advantage is higher accuracy, especially with the development of modeling methods and the progress and specifications of semiconductor technology, people have been able to provide this model at multiple levels to meet different accuracy requirements. The disadvantage is that the model is complex and the calculation time is long.

Generally, the driver and receiver models are provided by the device manufacturer, and the transmission line model is usually extracted from the field analyzer. The package and connector models can be extracted by the field analyzer or provided by the manufacturer.

There are many models that can be used for PCB board-level signal integrity analysis in electronic design. Among them, there are three most commonly used models, namely SPICE, IBIS, Verilog-AMS, and VHDL-AMS.

1. SPICE model

Spice is the abbreviation of SimulationProgramwithIntegratedCircuitEmphasis. It is a powerful general-purpose analog circuit simulator with decades of history. The program was developed by the Department of Electrical Engineering and Computing Science, University of California, Berkeley, and is mainly used for integrated circuit circuits. In the analysis program, the Spice netlist format has become the standard for the description of the usual analog circuits and transistor-level circuits. Set as the American National Industrial Standard, it is mainly used for the design and simulation of electronic systems such as IC, analog circuit, digital-analog hybrid circuit, power circuit and so on. Because the Spice simulation program adopts a completely open policy, users can modify it according to their own needs. In addition, it has good practicability and is quickly promoted. It has been transplanted to multiple operating system platforms.

Since the advent of Spice, its version has been continuously updated. There are multiple versions such as Spice2 and Spice3. The new version is mainly enhanced in circuit input, graphics, data structure and execution efficiency. It is generally believed that Spice2G5 is the most successful and effective Yes, future versions are only partial changes.

At the same time, various commercial Spice circuit simulation tools with Berkeley's Spice simulation program algorithm as the core have also been produced. They run on PC and UNIX platforms. Many of them are based on the original SPICE2G6 version of the source code. This is a publicly published version. Versions, they have done a lot of practical work on the basis of Spice. The more common Spice simulation software includes Hspice, Pspice, Spectre, Tspice,

SmartSpcie, IsSpice, etc., although their core algorithms are the same, the simulation speed, accuracy, and convergence are different. Among them, Hspice from Synopsys and Pspice from Cadence are the most famous. Hspice is the de facto Spice industry standard simulation software. It is the most widely used in the industry. It has the characteristics of high accuracy and powerful simulation functions. However, it does not have a front-end input environment and needs to prepare the netlist file in advance. It is not suitable for primary users. The main application For integrated circuit design; Pspice is the best choice for individual users. It has a graphical front-end input environment, friendly user interface, and high cost performance. It is mainly used in PCB board and system-level design.

SPICE simulation software includes two parts: model and simulator. Because the model and the simulator are tightly integrated, it is very difficult for users to add new model types, but it is easy to add new models, and only needs to set new parameters for the existing model types.

The SPICE model consists of two parts: model equations (ModelEquations) and model parameters (ModelParameters). Since the model equation is provided, the SPICE model can be closely connected with the algorithm of the simulator, and better analysis efficiency and analysis results can be obtained.

Now SPICE model has been widely used in electronic design, which can perform nonlinear DC analysis, nonlinear transient analysis and linear AC analysis of circuits. The components in the analyzed circuit can include resistance, capacitance, inductance, mutual inductance, independent voltage sources, independent current sources, various linear controlled sources, transmission lines, and active semiconductor devices. SPICE has built-in semiconductor device models, users only need to select the model level and provide appropriate parameters.

When using the SPICE model to perform SI analysis at the PCB board level, it is necessary for the IC designer and manufacturer to provide a detailed and accurate description of the SPICE model of the integrated circuit I/O unit sub-circuit and the manufacturing parameters of the semiconductor characteristics. Because these materials usually belong to the intellectual property and confidentiality of designers and manufacturers, only a few semiconductor manufacturers will provide corresponding SPICE models while providing chip products.

The analysis accuracy of the SPICE model mainly depends on the source of the model parameters (that is, the accuracy of the data) and the applicable scope of the model equations. The combination of model equations with various digital simulators may also affect the accuracy of the analysis. In addition, the PCB board-level SPICE model has a large amount of simulation calculation, and the analysis is relatively time-consuming.

Two, IBIS model

IBIS is the abbreviation of I/OBufferInformationSpecification. It is a method of quickly and accurately modeling I/OBUFFER based on I/V curve. It is an international standard that reflects the electrical characteristics of chip driving and receiving. It provides a standard file Format to record parameters such as drive source output impedance, rise/fall time and input load, which is very suitable for calculation and simulation in high-speed circuit design such as oscillation and crosstalk.

In order to formulate a unified IBIS format, EDA companies, IC suppliers and end users established an IBIS format development committee, and the IBIS Open Forum was also born. It is composed of a number of EDA manufacturers, computer manufacturers, semiconductor manufacturers and universities.

In 1993, the format development committee launched the first standard Version 1.0 of IBIS, and it has been revised continuously. The latest official version is Version 4.1 released in 2004. V4.1 mainly adds to the multi-language model. Support for BerkeleySPICE, VHDL-AMS and Verilog-AMS, the IBIS model has the ability to model the entire system, and the range of model applications has been greatly expanded, but this requires a hybrid simulation engine that supports these models at the same time. Simulation, so the large-scale application of model software will take time. The IBIS standard has been recognized by EIA and is defined as the ANSI/EIA-656-A standard. Each new version will add some new content, but these new content are only optional items in an IBIS model file rather than necessary items, which ensures the backward compatibility of the IBIS model.

Now, dozens of EDA companies have become members of the IBIS open forum. EDA companies that support IBIS provide IBIS models and software simulation tools for different devices. More and more semiconductor manufacturers have begun to provide IBIS models of their products. Since the IBIS model does not need to describe the internal design of the I/O unit and transistor manufacturing parameters, it has been welcomed and supported by semiconductor manufacturers. Now all major digital integrated circuit manufacturers can provide corresponding IBIS models while providing chips.

The IBIS specification itself is just a file format. It explains how to record the different parameters of a chip's driver and receiver in a standard IBIS file, but it does not explain how these recorded parameters are used. These parameters need to be used by the IBIS model. The simulation tool to read.

The IBIS model only provides a description of the behavior of the driver and receiver, but does not leak the intellectual property details of the internal structure of the circuit. In other words, sellers can use the IBIS model to illustrate their latest door-level design work without revealing too much product information to their competitors. Moreover, because IBIS is a simple model, the PCB board-level simulation uses table look-up calculations, so the calculation amount is small, which saves 10-15 times the calculation amount compared with the corresponding full Spice triode-level model simulation.

IBIS provides two complete I/V curves that represent the high-level and low-level states of the driver, as well as the state transition curves at a certain conversion speed. The function of the I/V curve is to provide IBIS with the ability to model nonlinear effects such as protection diodes, TTL totem pole drive sources, and emitter follower output. The analysis accuracy of the IBIS model mainly depends on the number of data points in the I/V and V/T tables and the accuracy of the data.

Compared with the Spice model, the advantages of the IBIS model can be summarized as follows:

It can provide accurate models in terms of I/O nonlinearity, while taking into account the parasitic parameters of the package and the ESD structure;

Provide faster simulation speed than structured method; v

It can be used for system board-level or multi-board signal integrity analysis and simulation. The signal integrity problems that can be analyzed by the IBIS model include: crosstalk, reflection, oscillation, overshoot, undershoot, mismatched impedance, transmission line analysis, and topology analysis. IBIS is especially capable of accurate and precise simulation of high-speed oscillation and crosstalk. It can be used to detect the worst-case signal behavior under rise time conditions and some situations that cannot be solved by physical testing; v

Models can be obtained from semiconductor manufacturers for free, and users do not need to pay extra for models; v

Compatible with a wide range of simulation platforms in the industry, almost all signal integrity analysis tools accept IBIS models. v

Of course, IBIS is not perfect, it also has the following shortcomings:

Many chip manufacturers lack support for the IBIS model. v

Without the IBIS model, IBIS tools cannot work. Although IBIS files can be created manually or automatically converted through Spice models, if the minimum rise time parameters cannot be obtained from the manufacturer, no conversion tool can do anything.

IBIS cannot ideally handle driver-type circuits with controlled rise time, especially those circuits that contain complex feedback;

IBIS lacks the ability to model ground bomb noise. Version 2.1 of the IBIS model contains the mutual inductance describing different pin combinations, from which some very useful ground bounce information can be extracted. The reason why it doesn't work is the modeling method. When the output jumps from high level to low level, the large ground bounce voltage can change the behavior of the output driver. v

Three, Verilog-AMS model and VHDL-AMS model

Compared with the Spice model and the IBIS model, the Verilog-AMS and VHDL-AMS models appear later and are a behavioral model language. As hardware behavior-level modeling languages, Verilog-AMS and VHDL-AMS are supersets of Verilog and VHDL, respectively, while Verilog-A is a subset of Verilog-AMS.

In the analog/mixed signal (AMS) language, unlike the SPICE and IBIS models, in the AMS language, it is up to the user to write equations describing the behavior of the components. Similar to the IBIS model, the AMS modeling language is an independent model format that can be used in many different types of simulation tools. AMS equations can also be written at many different levels: transistor level, I/O unit level, I/O unit group, etc. The only requirement is that the manufacturer can write an equation describing the port input/output relationship.

In fact, the AMS model can also be used for non-electrical system components. Generally, the model can be written simpler to speed up the simulation. A more detailed model often requires more time to simulate. In some cases, a relatively simple behavior model is more accurate than the Spice model.

Since Verilog-AMS and VHDL-AMS are both new standards, they have only been adopted in the past five years. So far only a few semiconductor manufacturers can provide AMS models. Simulators that can support AMS are better than SPICE and IBIS. Less. However, the feasibility and calculation accuracy of the AMS model in the PCB board-level signal integrity analysis are no inferior to the SPICE and IBIS models.

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4.12004VHDL-AMS1999

Verilog-AMS1998

4 model verification

No matter which model and simulation tool you decide to choose, the method you use must be effective. At least, the accuracy and completeness of the model must be guaranteed. For example, the IBIS model of a receiver must include the values of Vinl and Vinh, and the IBIS model of the driver must include the value of Vmeas. The data sheet of the IBIS model can be checked through graphical display tools, such as Mentor's VisualIBISEditor or Cadence's ModelIntegrity tool.

At the same time, the model must be able to pass the test of the simulator. A simple point-to-point interconnection can be used to verify the model, such as detecting whether there are convergence problems. Note that the interconnection must include at least a section of transmission line, so that it can be observed. The clamping characteristics of reflection, overshoot and clamping diodes.

In the end, the model has to be checked again through actual hardware testing. Of course, the actual working conditions of the device cannot be completely consistent with the simulation parameters, and the measured data obtained cannot be completely consistent with the simulation results, but the reflected device characteristics should be consistent, such as the slope of the edge and the overshoot under the same load condition. The amplitude, the shape of the signal curve, etc. should be similar.

5 Model selection

Since there is no unified model to complete all PCB board-level signal integrity analysis, in the design of high-speed digital PCB board, it is necessary to mix the above-mentioned models to establish the transmission model of key signals and sensitive signals to the greatest extent.

For discrete passive components, you can seek SPICE models provided by manufacturers, or directly establish and use simplified SPICE models through experimental measurements, or use specialized modeling tools (such as 3D and 2D electromagnetic field model extraction software) to model.

For key digital integrated circuits, you must seek models provided by manufacturers, such as IBIS models or Spice. At present, most integrated circuit designers and manufacturers can provide the required IBIS models while providing chips through Web sites or other methods. IBIS models are generally not provided. If necessary, they can be obtained from manufacturers.

For non-critical integrated circuits, if the manufacturer's IBIS model is not available, a similar or default IBIS model can also be selected according to the function of the chip pins. Of course, a simplified IBIS model can also be established through experimental measurements.

For the transmission line on the PCBboard, the simplified transmission line SPICE model can be used in the signal integrity pre-analysis and space-solving analysis, and the complete transmission line SPICE model needs to be used in the analysis after the wiring according to the actual layout design. If more precise analysis is required, and accurate modeling of the transmission line is required, two-dimensional or three-dimensional model extraction tools can be used.