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PCB Tech - IPC-based PCB packaging design for surface mount devices

PCB Tech

PCB Tech - IPC-based PCB packaging design for surface mount devices

IPC-based PCB packaging design for surface mount devices

2021-10-29
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Author:Downs

In order to solve the problem of compromise between manufacturability and product performance in the PCB design process, the surface mount device PCB package is designed according to the IPC-7351b standard.


Introduction

At present, in the PCB design process, due to product miniaturization, high density, and reliability requirements, many times it is necessary to compromise between manufacturability and product performance. In the PCB design process, the package design is an important and easily overlooked process, and its design quality directly affects the later device assembly and product quality. At present, there are many packaging design standards, including international standards, national military standards, corporate standards, and unified design standards that must be used to guide design.


1. Overview

1.1 The importance of PCB packaging design

In the process of PCB design, the following problems sometimes occur:

1) Components and PCB board pad specifications do not match, for example, 0603 specifications are mounted on 0805 specifications, or 0805 specifications are mounted on 0603 specifications;

pcb design

2) There are many different package designs for components of the same specification, and the standards are not uniform;

3) The pad size matched by the PCB package does not meet the requirements of the specification.

The above problems are all due to the inconsistent and non-standard library construction standards that cause great troubles and even poor soldering in the later SMT operations, which ultimately affects product quality and production efficiency; therefore, the design of PCB packaging has an impact on the manufacturability and life of SMT products. Have a great impact.


1.2 Introduction to IPC-7351b Standard

IPC is the International Electronic Industry Connection Association. IPC-7351b is a general requirement for surface mount design and land pattern standards, replacing the IPC-SM-782A standard. IPC-7351b recommends the design of PCB package pads from variables such as component density, high-impact environment and rework requirements, and IPC-7351b divides PCB packages into 3 types. As shown in Figure 1, users can choose the size that suits their products from 3 densities.

1) Density grade A

Maximum pad extension, suitable for low component density applications, typical examples are portable/handheld products or products exposed to high shock or vibration environments. The welded structure is the strongest and can be easily reworked if needed. Both manual welding and machine welding can be operated with a large margin.

2) Density class B

The medium pad extends, which is suitable for products with medium component density and provides a solid soldering structure. Both manual welding and machine welding can be operated.

3) Density class C

The smallest pad extension is suitable for micro devices with the smallest soldering structure requirements on the pad pattern, and the highest component assembly density can be achieved. Suitable for machine welding, manual welding is more difficult.


2. Surface mount electronic components packaging design

2.1 SMD pad design

2.1.1 Calculation of SMD pad size for standard package

Standard packages refer to packages that comply with international standards such as JEDEC and EIA, such as SOP, SOIC, TSSOP, TQFP, etc. The pad calculation formula for this package form is as follows:

Among them: Z is the distance between the outer edges of the pads on both sides of the package; G is the distance between the inner edges of the pads on both sides of the package; X is the width of the package pads; L is the distance between the outermost edges of the pins on both sides of the component; S is the representation element The distance between the inner edges of the pins on both sides of the device; W is the width of the pins of the component; JT is the length of the solder joint extension (toe), that is, the toe; JH is the length of the solder joint inner edge (heel), that is, the heel; JS is the solder joint The length of the side of the point, that is, the side of the foot; CL is the size tolerance of the component, the difference between the maximum and minimum values of L; CS is the size tolerance of the component, the difference between the maximum and minimum S Value; CW is the size tolerance of components, the difference between the maximum and minimum values of W; F is the tolerance during printed board processing; P is the tolerance during SMT machine welding.

2.1.2 Pin calculation parameters of various package forms

In the IPC-7351b standard, there are recommendations for package calculation parameters JT, JH, and JS for various standard packaging forms and three density levels, as well as recommendations for adjustment coefficients. The packaging parameters can be calculated according to the density grade of the product.

2.1.3 SMD pad solder mask parameter setting

The size of the pad solder mask indicates the opening size of the pad, and its size is generally expanded by a size on the basis of the pad size. The expanded size needs to be determined according to the manufacturer's process capability. It is generally recommended to set as follows: expand 6mil on the basis of the pad size, and the solder mask of the non-metallized hole is the same as the hole size.

2.2.2 Silk screen layer

The package silk screen layer is mainly used to indicate the physical size range of the device on the PCB, and as a reference for device positioning during the SMT assembly of the device on the PCB. Combining the CADENCE design software and the manufacturer's conventional processing capabilities, SMD device PCB packaging silk screen layer design has some special considerations. Of course, the parameters can be adjusted according to the production process.

1) The line width of the silk screen layer is generally 5mil.

2) The outer frame of the silk screen layer is not allowed to press the pad, and the distance from the pad is generally required to be ≥10 mil.

3) The silk screen layer needs to draw the 1-pin mark of the device. A hollow circle can be used. The recommended line width is 5mil and the radius is 20mil to facilitate processing and later PCB inspection. At the same time, the hollow circle cannot overlap with other silk screens.

4) For devices with positive and negative polarity, the positive or negative polarity of the device should be clearly marked to facilitate the assembly and identification of the device.

2.2.3 The physical size of the device

When the PCB package is established, the size of the package area can be used as a DRC check item of the device layout in the CADENCE software. The size of the package area can be considered to be composed of two items, including the maximum external size of the package and the device pitch required by the soldering process together to form the package area. Table 4 recommends the device spacing required by common soldering processes. If there is interference software in the packaging area during PCB design, it will automatically report an error.


3. Concluding remarks

In the PCB packaging design process, as long as the environmental conditions, product performance, density level, product manufacturability are considered comprehensively, follow the chip design manual, and refer to the IPC-7351 standard, you can definitely design to meet the product performance requirements PCB package with good manufacturability. The author's unit adopts the density grade A in the IPC-7351b standard to establish a component packaging library, which further improves product reliability. Practical results prove that the method is feasible and improves the weldability and reliability of the product.