PCB Tech - High-speed circuit Kunshan PCB design skills

The frequency of the design circuit is high. It is generally considered that if the frequency of the digital logic circuit reaches or exceeds 50 MHz, and the circuit working at this frequency occupies more than 1/3 of the entire system, it is called a high-speed circuit. If there are only a few signals such as the system clock in the system that work at such a high frequency, it still does not belong to the field of high-speed circuits.

The digital signal in the design circuit jumps quickly. It is usually agreed that when the digital signal rise or fall time is less than 5% of the signal period, it is called a high-speed circuit.

Figure 1 is a waveform diagram of a signal line in a high-speed circuit, which shows the actual situation of the current flowing in this signal line in the circuit. The multiple signal waveforms in the figure are because the signal line is connected to the pins of many different components, so multiple signals will be superimposed.

It is not difficult to see from the figure that the bottom and top of the signal have different degrees of benefits, irregular oscillations, delays within the expected range, etc. These phenomena generally do not appear in low-speed circuit design, as the system circuit speed increases, The above problems will follow. Therefore, the design of high-speed circuits cannot be as simple as the design of low-speed circuits. New knowledge and new thinking must be added to avoid and reduce the occurrence of the above situations. On the basis of practical application and reference to other documents, I have the following considerations for high-speed circuit design.

2, timing coordination considerations

Today's electronic products mostly run at 100 MHz or even higher frequencies, such as RAM, CPU, FPGA, ASIC, and random logic. All of these are devices with strong timing requirements. If the timing coordination between them does not meet the specified Requirements, it is easy to cause system work disorder, so a problem that should be considered for high-speed circuit design should be the timing coordination problem.

The timing coordination is mainly reflected in: the signal's setup time and hold time violate the standard, the small pulse width does not meet the requirements, and the phase overlap caused by the multi-phase clock in the system. In high-speed circuit design, the signal period is generally only ns wide. At this time, it is not easy to ensure accurate coordination between the clock signal and the data signal. In addition, there are more or less various kinds of devices in the device itself. Parameter drift, dispersion, etc., make it more difficult to achieve mutual coordination between different timing signals. In view of the above, the design of high-speed circuits should first consider the functional simulation verification before design, and theoretically carefully analyze whether each signal can meet the expected indicators. The second is to check whether each device in the sequential circuit meets its own timing requirements. For all involved devices, high-frequency testing equipment should be used to carefully check and verify the various parameters of the device itself.

3, signal integrity considerations

Before any circuit design, the integrity of each signal in the system after the circuit design is completed, namely SI (Signal Integrity), also known as signal quality. This is even more important in high-speed circuit design. If not fully considered in advance, it is easy to cause serious damage to the quality of each signal in the system, or the integrity of the signal will easily be destroyed. The following situations are the manifestations that affect signal integrity in high-speed circuit design.

3.1 Crosstalk between signals

The form of string winding can be illustrated in Figure 2. When an alternating current passes through a signal line, an alternating magnetic field will be generated around it, and a wire in the alternating magnetic field will induce a certain voltage signal. In this way, related voltage signals will be induced on the adjacent signal lines, causing the two signal lines to affect each other, which will cause the quality of the signal in the wire to decrease. The size of the cross-winding between the signal lines mainly depends on the rate of change of the magnetic field (generally determined by the change law of the rising and falling edges of the driving signal), the dielectric properties of the surrounding medium, and the distance between wirings.