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Electronic Design

Electronic Design

Electronic Design

Electronic Design

Design of PCB test points and test holes
2021-09-29
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Author:Aure

Design of PCB test points and test holes



In order to ensure quality and reduce costs in SMT mass production, online testing is indispensable. In order to ensure the smooth progress of the test work, the design of the test points and test holes (electrical connection holes used for the electrical performance testing of PCB and PCB components) should be considered during PCB design.


(1) Contact reliability test design. In principle, the test points should be located on the same surface and be evenly distributed. The diameter of the pad at the test point is 09mm ~1.0mm, and it is matched with the relevant test pin. The center of the test point should fall on the grid, and it should not be designed within 5mm of the edge of the board, and the center distance between adjacent test points should not be less than 1.46mm.



Design of PCB test points and test holes

No other components should be designed between the test points, and the distance between the test point and the component pad should not be less than 1mm to prevent short circuits between the components or test points, and note that the test points cannot be coated with any insulating layer.



In principle, the test holes can be replaced by process holes, but the test holes should still be designed on the daughter board when testing the single board of the jigsaw.


(2) Electrical reliability test design, all electrical nodes should provide test points, that is, test points should be able to cover all I/0, power ground and return signals, and each IC should have power and ground test points. If the device has more than one power supply and ground pin, test points should be added separately. The power supply and ground of an integrated block should be placed within 2.54mm. The IC control line cannot be directly connected to the power supply, ground or common resistance. VLSI and ASIC devices with boundary scan devices should be added as auxiliary test points to realize boundary scan functions, such as clock, mode, data serial input/output terminal, reset terminal, in order to test the internal functional logic of the device itself. Require.

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