PCB Tech - What are the wiring design rules for high-speed PCB boards?

What are the wiring design rules for high-speed PCB boards?

As a PCB design engineer, it is very necessary, or even necessary, to have some knowledge of high-speed PCB boards wiring design. Today, let the engineer explain the design and wiring rules of high-speed PCB boards for you in detail?

1. Wiring requirements for high-speed parallel buses

  (1) The bus is preferably internal wiring, and the distance between the bus and other wiring should be increased as much as possible.

  (2) In addition to special requirements, the single-line design impedance is guaranteed to be 50 ohms, and the differential design impedance is guaranteed to be 100 ohms.

  (3) The same group of buses maintain the same length of wiring and follow a certain timing relationship with the clock line.

  (4) As close as possible to the I/O power supply or GND reference plane of this group of buses.

  (5) The bus whose rise time is less than 1ns requires a complete reference plane.

  (6) It is recommended that the lower address bus refer to the clock wiring requirements.

  (7) The spacing of serpentine winding shall not be less than 3 times the line width.

2. Wiring requirements for high-speed serial buses

  (1) It is necessary to consider the loss of wiring and determine the line width and line length.

  (2) It is recommended that the line width is not less than 5mil under normal circumstances, and the wiring should be as short as possible.

  (3) Except for Fanout vias, try not to punch holes and change layers.

  (4) For the plug-in pins involved in the serial bus, when the rate is above 3.125Gbps, the anti-pad should be optimized.

  (5) When changing the wiring layer, choose the wiring layer with the smallest via stub. When the wiring space is limited, the wiring layer with the short via stub is preferentially allocated to the sender.

  (6) When the rate reaches 3.125Gbps or above, a ground hole is drilled beside the signal via.

  (7) If the high-speed signal via is back-drilled, it is necessary to consider the influence of the reduction of the current capacity of the power ground plane and the increase of the filter loop inductance.

  (8) The high-speed signal avoids the dividing line of the plane layer, and the horizontal distance between the edge of the signal line and the edge of the dividing line is guaranteed to be 3W.

  (9) High-speed signals in both directions cannot be crossed and routed.

The above is the design and wiring rules of the high-speed PCB board that the engineer explained in detail for you. I hope it will help you.