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Eight Misunderstandings of PCB Circuit Board Design Must Know
2021-08-25
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Author:Aure

Eight Misunderstandings of PCB Circuit Board Design Must Know

   We often find that some rules or principles that we take for granted often have some errors. Electronic engineers will also have such examples in circuit design. The following are eight misunderstandings summarized by a PCB circuit board design engineer.
 
  Misunderstanding 1: There are so many doors left in this FPGA, so you can play to your heart’s content
 
   Comment: The power consumption of FGPA is proportional to the number of flip-flops used and the number of flips, so the power consumption of the same type of FPGA at different circuits and different times may be 100 times different. Minimizing the number of flip-flops for high-speed flipping is the fundamental way to reduce FPGA power consumption.
 
   Misunderstanding 2: The PCB circuit board design requirements of this PCB board are not high, so use a thinner wire and automatic layout
 
Comment: Automatic wiring will inevitably take up a larger PCB area, and at the same time produce many times more vias than manual wiring. In a large batch of products, the factors that the circuit board manufacturer considers in addition to business factors are line width and The number of vias, which respectively affect the yield of PCB and the consumption of drill bits, saves the cost of the supplier, and finds a reason for the price reduction.
 
  Misunderstanding 3: How to deal with these unused I/O ports of CPU and FPGA? Let it be empty first, I'll talk about it later
 
   Comment: If the unused I/O port is left floating, it may become an input signal that repeatedly oscillates with a little interference from the outside world, and the power consumption of MOS devices basically depends on the number of flips of the gate circuit. If it is pulled up, each pin will also have microampere current, so the best way is to set it as output (of course, no other signals with driving can be connected to the outside)
 
   Misunderstanding 4: These bus signals are all pulled by resistors, so I feel relieved
 
   Comment: There are many reasons why signals need to be pulled up and down, but not all of them need to be pulled. The pull-up and pull-down resistors pull a simple input signal, and the current is less than tens of microamperes, but when a driven signal is pulled, the current will reach the milliamp level. The current system often has 32 bits of address data each, and there may be If the 244/245 isolated bus and other signals are pulled up, a few watts of power consumption will be consumed on these resistors.


Eight Misunderstandings of PCB Circuit Board Design Must Know

  Misunderstanding 5: The power consumption of these small chips is very low, so don’t worry about it
 
Comment: It is difficult to determine the power consumption of the internal chip that is not too complicated. It is mainly determined by the current on the pin. An ABT16244 consumes less than 1 mA without load, but its indicator is each pin. It can drive a load of 60 mA (such as matching a resistance of tens of ohms), that is, the maximum power consumption of a full load can reach 60*16=960mA. Of course, only the power supply current is so large, and the heat falls on the load.
 
   Misunderstanding 6: The memory has so many control signals, my PCB board only needs to use the OE and WE signals, and the chip select should be grounded, so that the data comes out much faster during the read operation
 
Comment: The power consumption of most memories when the chip selection is valid (regardless of OE and WE) will be more than 100 times larger than when the chip selection is invalid. Therefore, CS should be used to control the chip as much as possible, and as far as other requirements are met. It is possible to shorten the width of the chip select pulse.
 
   Misunderstanding 7: Reducing power consumption is all about hardware personnel, and it has nothing to do with software
 
Comment: The hardware is just a stage, but the software is the performer. The access of almost every chip on the bus and the flip of every signal are almost controlled by the software. If the software can reduce the number of accesses to the external memory (using more register variables, More use of internal CACHE, etc.), timely response to interrupts (interrupts are often low-level active with pull-up resistors) and other specific measures for specific boards will all contribute greatly to reducing power consumption.
 
   Misunderstanding 8: Why are these signals overshooting? As long as the match is good, it can be eliminated
 
   Comment: Except for a few specific signals (such as 100BASE-T, CML), there is overshoot. As long as it is not very large, it does not necessarily need to be matched. Even if it is matched, it is not necessary to match the best. For example, the output impedance of TTL is less than 50 ohms, and some even 20 ohms. If such a large matching resistance is used, the current will be very large, the power consumption will be unacceptable, and the signal amplitude will be too small to be used. Besides, the output impedance of a general signal when outputting a high level and outputting a low level is not the same, and there is no way to achieve a complete match. Therefore, the matching of TTL, LVDS, 422 and other signals can be acceptable as long as the overshoot is achieved.