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PCB Blog - High-speed PCB board design transmission line effect problem

PCB Blog

PCB Blog - High-speed PCB board design transmission line effect problem

High-speed PCB board design transmission line effect problem

2022-09-01
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Author:iPCB

The process of high-speed PCB board design, due to the transmission line effect, will lead to some signal integrity problems. How to deal with it? Here are four points to share with you:


1. Strictly control the length of key network cables

If there are high-speed transition edges in the design, the problem of transmission line effects on the PCB must be considered. This problem is even more present in the fast integrated circuit chips with very high clock frequencies that are commonly used today. There are some basic principles to solve this problem: if CMOS or TTL circuits are used for design, the operating frequency is less than 10MHz, and the wiring length should be no more than 7 inches. Operating frequency at 50MHz, the wiring length should be no more than 1.5 inches. If the operating frequency reaches or exceeds 75MHz, the wiring length should be within 1 inch. The wiring length for GaAs chips should be 0.3 inches. If you exceed this standard, there is a problem with the transmission line.

PCB board

2. Reasonably plan the topology of the traces

Another way to address transmission line effects is to choose the correct routing path and termination topology. The topology of the wiring refers to the wiring sequence and wiring structure of a network cable. When using high-speed logic devices, unless the trace branch lengths are kept short, signals with rapidly changing edges will be distorted by branch traces on the signal trunk trace. Under normal circumstances, two basic topologies are used for PCB routing, namely Daisy Chain routing and Star distribution. For daisy-chain wiring, the wiring starts from the driver and goes to the receivers in sequence. If series resistors are used to change the signal characteristics, the series resistors should be placed close to the drive terminals. In terms of controlling the high-order harmonic interference of the wiring, the daisy-chain wiring effect is very good. However, the routing rate of this routing method is not easy to 100% routing. In the actual design, we make the branch length in the daisy chain wiring as short as possible, and the safe length value should be: the star topology can effectively avoid the asynchronous problem of the clock signal, but it is done manually on the high-density PCB board. Wiring is very difficult. Using an autorouter is the way to accomplish star wiring. Terminating resistors are required on each branch. The value of the termination resistor should match the characteristic impedance of the connection. This can be calculated by hand or by CAD tools to calculate the characteristic impedance value and termination matching resistance value. Simple termination resistors were used in the above two examples, in practice more complex matched terminations could be used. One option is RC matching termination. The RC matching terminal can reduce power consumption, but it can only be used when the signal operation is relatively stable. This method is suitable for matching the clock line signal. The disadvantage is that the capacitance in the RC matching termination can affect the shape and speed of the signal. The series resistor-matched termination does not generate additional power dissipation, but it will slow down the transmission of the signal. This method is used for bus drive circuits where the time delay has little effect. The advantage of series resistor matching termination is that it can reduce the number of components used and wiring density on the board. One way is to separate the matching terminals, in which the matching components need to be placed near the receiving end. The advantage is that it does not pull down the signal, and noise is well avoided. Typically used for TTL input signals (ACT, HCT, FAST). In addition, the package type and mounting type of the terminal matching resistor must also be considered. Usually, SMD surface mount resistors have lower inductance than through-hole components, so SMD package components become. If you choose ordinary in-line resistors, there are also two installation methods: vertical and horizontal. In the vertical installation method, one mounting pin of the resistor is very short, which can reduce the thermal resistance between the resistor and the circuit board, and make the heat of the resistor easier to dissipate into the air. But a longer vertical mount will increase the inductance of the resistor. The horizontal installation has lower inductance due to lower installation. However, the overheated resistor will drift, and in the worst case, the resistor will become an open circuit, resulting in the failure of the PCB trace termination matching and becoming a potential failure factor.


3. Methods of Suppressing Electromagnetic Interference

A good solution to the signal integrity problem will improve the electromagnetic compatibility (EMC) of the PCB board. It is very important to ensure that the PCB board has a good grounding. Using a signal layer with a ground plane is a very effective method for complex designs. In addition, making the signal density of the outer layer of the circuit board is also a good way to reduce electromagnetic radiation. This method can be realized by using the "surface area layer" technology "Build-up" design to make the PCB board. The surface area layer is achieved by adding a combination of thin insulating layers and micro vias for penetrating these layers on a common process PCB board. Resistors and capacitors can be buried under the surface layer, and the density of traces per unit area will nearly double, so The volume of the PCB board can be reduced. The reduction of PCB board area has a huge impact on the topology of the trace, which means reduced current loop, reduced branch trace length, and electromagnetic radiation is approximately proportional to the area of the current loop; at the same time, small volume features mean high-density Lead-packed devices can be used, which in turn reduces wire lengths, reduces current loops, and improves electromagnetic compatibility.


4. Other technologies that can be used

In order to reduce the transient overshoot of the voltage on the power supply of the integrated circuit chip, decoupling capacitors should be added to the integrated circuit chip. This effectively removes the effects of glitches on the power supply and reduces radiation from the power loop on the printed board. When the decoupling capacitor is directly connected to the power tube leg of the integrated circuit instead of the power plane, its effect of smoothing the glitch is. This is why some devices have decoupling capacitors on their sockets, while others require the decoupling capacitors to be sufficiently close to the device. Any high-speed and high-power devices should be placed together as much as possible to reduce transient overshoot of the supply voltage. Without power planes, long power traces can create loops between signals and loops, becoming sources of radiation and susceptible circuits. The situation where the traces form a loop that does not pass through the same network cable or other traces is called an open loop. If the loop passes through other traces of the same network cable, a closed loop is formed. Antenna effects are created in both cases (wire antennas and loop antennas). The antenna generates EMI radiation to the outside, and it is also a sensitive circuit itself. Closing the loop is a must because it produces radiation that is approximately proportional to the area of the closed loop on PCB board.