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PCB Tech - About impedance matching of high-speed PCB design

PCB Tech

PCB Tech - About impedance matching of high-speed PCB design

About impedance matching of high-speed PCB design

2021-10-07
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Author:Frank

About impedance matching of high-speed PCB design
Impedance matching means that during energy transmission, the load impedance is required to be equal to the characteristic impedance of the transmission line. At this time, the transmission will not produce reflection, which indicates that all the energy is absorbed by the load. On the contrary, there is energy loss in transmission. In high-speed PCB design, the impedance matching is related to the quality of the signal.

When do PCB traces need to be impedance matched?

The key is not to look at the frequency, but to look at the steepness of the signal edge, that is, the rise/fall time of the signal. It is generally believed that if the rise/fall time of the signal (calculated by 10% to 90%) is less than 6 times the wire delay, it is high speed. Signal, must pay attention to the problem of impedance matching. The wire delay is generally 150ps/inch.

Characteristic impedance

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In the process of signal propagation along the transmission line, if there is a consistent signal propagation speed everywhere on the transmission line, and the capacitance per unit length is also the same, then the signal will always see a completely consistent instantaneous impedance during the propagation process. Since the impedance remains constant on the entire transmission line, we give a specific name to represent this characteristic or characteristic of a specific transmission line, which is called the characteristic impedance of the transmission line. The characteristic impedance refers to the instantaneous impedance value seen by the signal when the signal propagates along the transmission line. The characteristic impedance is related to factors such as the layer of the PCB conductor, the material (dielectric constant) used by the PCB, the width of the trace, and the distance between the conductor and the plane, and has nothing to do with the length of the trace. The characteristic impedance can be calculated using software. In high-speed PCB wiring, the trace impedance of the digital signal is generally designed to be 50 ohms, which is an approximate figure. It is generally stipulated that the coaxial cable baseband is 50 ohms, the frequency band is 75 ohms, and the paired wire (differential) is 100 ohms.

Common ways of impedance matching

1. Series terminal matching

Under the condition that the signal source end impedance is lower than the characteristic impedance of the transmission line, a resistor R is connected in series between the source end of the signal and the transmission line to match the output impedance of the source end with the characteristic impedance of the transmission line and suppress the signal reflected from the load end. The reflection occurred again.

Matching resistance selection principle: The sum of the matching resistance value and the output impedance of the driver is equal to the characteristic impedance of the transmission line. The output impedance of common CMOS and TTL drivers will vary with the level of the signal. Therefore, for TTL or CMOS circuits, it is impossible to have a very correct matching resistance, and only a compromise can be considered. The chain topology signal network is not suitable for series terminal matching, and all loads must be connected to the end of the transmission line.

Series matching is the most commonly used terminal matching method. It has the advantage of low power consumption, no additional DC load to the driver, no additional impedance between the signal and ground, and only a resistive element is required. Common applications: impedance matching of general CMOS and TTL circuits. The USB signal is also sampled in this way for impedance matching.

2. Parallel terminal matching

When the impedance of the signal source is very small, the input impedance of the load is matched with the characteristic impedance of the transmission line by increasing the parallel resistance, so as to eliminate the reflection of the load. The realization form is divided into two forms of single resistance and double resistance.

Matching resistance selection principle: When the input impedance of the chip is very high, for the single-resistor form, the parallel resistance value of the load must be close to or equal to the characteristic impedance of the transmission line; for the dual-resistance form, each parallel resistance value It is twice the characteristic impedance of the transmission line.

The advantage of parallel terminal matching is simple and easy, but the obvious disadvantage is that it will bring DC power consumption: the DC power consumption of the single-resistance method is closely related to the duty cycle of the signal; the double-resistance method does not matter whether the signal is high or low All have DC power consumption, but the current is half less than the single resistance method.
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